Display Device With Monolithic Reading Circuits for Narrow Bezels
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Solution Overview
Problem
The increasing number of mounted IC chips in display devices hinders the development of narrow bezels and increases manufacturing costs, while existing A/D converter circuits occupy a large area, necessitating a more efficient and cost-effective solution.
Innovation Solution
The integration of a resistive divider circuit using diode-connected transistors with metal oxide semiconductor layers, allowing for the monolithic formation of driver and reading circuits on the substrate, reducing the need for IC chips and minimizing bezel width.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If more IC chips are mounted to provide driver circuits and reading circuits, then the functionality and reliability of the display device are improved, but the manufacturing cost increases and the bezel width increases
Solution Approach 1:
The patent merges the driver circuit and reading circuit functions into a single IC chip, reducing the total number of chips from multiple separate components to one integrated chip. This consolidation maintains all necessary functionalities while reducing manufacturing complexity and cost, directly resolving the contradiction between reliability (maintained through complete functionality) and ease of manufacture (improved through reduced chip count).
Solution Approach 2:
The single IC chip is designed to perform multiple functions: driving the pixel circuits and reading data from them. This multi-functional design eliminates the need for separate driver and reading chips, thereby reducing the number of mounted components and manufacturing cost while preserving complete system functionality and reliability.
2Adaptability or versatility
If more IC chips are mounted to provide driver circuits and reading circuits, then the functionality of the display device is improved, but the bezel width increases
Solution Approach 1:
By combining the driver circuit and reading circuit into one IC chip, the physical space required on the substrate is reduced. This allows the bezel width to be minimized while still accommodating all necessary circuit functionalities, thus resolving the contradiction between adaptability (maintained through complete functionality) and length (reduced bezel width).
Solution Approach 2:
The patent integrates multiple circuit functions within a single chip's three-dimensional structure, effectively utilizing vertical space and internal routing layers. This dimensional integration allows complex functionalities to coexist in a compact footprint, enabling narrow bezel design without sacrificing driver or reading circuit capabilities.
3Adaptability or versatility
If the A/D converter circuit is designed with conventional transistors, then the circuit functionality is achieved, but the circuit area is large
Solution Approach 1:
The patent changes the fundamental parameter of transistor structure from conventional planar geometry to vertical geometry. This parameter change enables the same circuit functionality to be achieved in a significantly reduced area, as the vertical transistor utilizes the depth dimension for current flow, thereby resolving the contradiction between adaptability (maintained functionality) and area (reduced footprint).
Solution Approach 2:
By transitioning from two-dimensional planar transistors to three-dimensional vertical transistors, the patent exploits the vertical dimension to achieve higher integration density. The vertical channel structure allows the transistor to perform the same switching and signal processing functions while occupying minimal planar area, thus enabling compact A/D converter circuit design without functionality loss.
Data Source
AI summary
An inexpensive display device with a narrow bezel is provided. The display device includes a first pixel including a light-emitting device, a second pixel including a light-receiving device, and a reading circuit for reading data obtained by the second pixel. The reading circuit includes a first circuit included in a mounted IC chip and a second circuit monolithically formed over a substrate over which a pixel circuit is formed. With this structure, a circuit corresponding to the second circuit can be omitted from the IC chip, so that the IC chip can be downsized.