Display Multiplexer Layout for Lower Capacitance and Power
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Solution Overview
Problem
The increasing hardware cost of source drivers in display panels due to improved resolution and data channels is exacerbated by the time delay and power consumption introduced by multiplexer circuits, necessitating an optimization of these circuits to reduce equivalent capacitance and power consumption.
Innovation Solution
A multiplexer circuit design where first and second control lines are disposed on opposite sides of transistors, reducing interlaced points between transmission and control lines, and varying line widths to minimize overlapping areas, thereby lowering equivalent capacitance and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a multiplexer circuit is introduced to reduce hardware cost, then the hardware cost of the source driver is reduced, but time delay and power consumption are increased
Solution Approach 1:
The patent introduces a second control line extending in the first direction (perpendicular to the first control lines), creating a two-dimensional control line arrangement. This dimensional change allows transmission lines to be routed between control lines, reducing interlacing points and equivalent capacitance while maintaining the multiplexer's cost-saving benefits
2Adaptability or versatility
If transmission lines are routed between control lines, then routing flexibility is improved, but interlacing points and equivalent capacitance increase
Solution Approach 1:
The patent segments the control lines into two distinct sets: first control lines extending in the second direction and second control lines extending in the first direction. This segmentation creates a grid-like structure that allows transmission lines to pass through gaps between control lines, reducing interlacing points and equivalent capacitance while maintaining routing flexibility
3Device complexity
If control lines are disposed on one side of transistors, then layout simplicity is maintained, but interlacing points between transmission and control lines increase
Solution Approach 1:
The patent transitions from a single-direction control line arrangement to a two-dimensional arrangement by introducing second control lines extending perpendicular to the first control lines. This dimensional change creates additional routing pathways that reduce interlacing points between transmission and control lines while maintaining layout organization
Data Source
AI summary
A multiplexer circuit and a display panel having the multiplexer circuit are provided. The multiplexer circuit includes a plurality of first transistors, a plurality of first control lines, a plurality of second control lines, a plurality of first transmission lines, and a plurality of second transmission lines. The first transistors are sequentially arranged along a first direction. The first control lines extend along the first direction and are disposed on a first side of the first transistors. The second control lines extend along the first direction and are disposed on a second side of the first transistors. The first transmission lines are respectively coupled between control terminals of a first group of the first transistors and the first control lines. The second transmission lines are respectively coupled to control terminals of a second group of the first transistors and the second control lines.