Display Multiplexer Circuit for Opposite-Polarity Pixel Driving
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Solution Overview
Problem
Traditional multiplexers using single-type transistors like NMOS or PMOS face challenges in maintaining sufficient driving capability for sub-pixels with different Gamma voltage polarities, leading to increased manufacturing costs and complexity due to the need for CMOS transistors, which require more complicated processes and masks.
Innovation Solution
The design incorporates multiple driving units with specific transistor configurations and reset signals to ensure sufficient driving capability for data lines and sub-pixels, allowing for the use of either NMOS or PMOS transistors, simplifying the manufacturing process by eliminating the need for CMOS transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If CMOS transistors are used to ensure sufficient driving capability for sub-pixels with different Gamma voltage polarities, then the driving capability is improved, but the manufacturing complexity and cost increase due to requiring more complicated processes and masks
Solution Approach 1:
The multiplexer is divided into first and second driving units, each handling specific polarity signals. This segmentation allows single-type transistors to be used in each unit while maintaining overall driving capability for both polarities, eliminating the need for complex CMOS processes.
Solution Approach 2:
Different driving units are designed with different configurations optimized for their specific function (driving sub-pixels with different polarities). The first driving unit uses configurations suitable for one polarity while the second unit uses configurations for the opposite polarity, allowing single-type transistors to perform locally optimized functions.
2Device complexity
If single-type transistors (NMOS or PMOS) are used to simplify the manufacturing process, then the manufacturing complexity is reduced, but the driving capability for sub-pixels with different Gamma voltage polarities becomes insufficient
Solution Approach 1:
The first and second driving units are merged into a single multiplexer structure, combining their complementary functions. This allows the multiplexer to achieve CMOS-like driving capability for both polarities while using only single-type transistors, simplifying manufacturing while maintaining performance.
Solution Approach 2:
The multiplexer design enables single-type transistors to perform multiple functions by using different driving unit configurations. The same type of transistor can drive both positive and negative polarity sub-pixels through the complementary structure of the first and second driving units.
3Ease of manufacture
If single-type transistors are used to reduce manufacturing costs, then the manufacturing cost is reduced, but the driving capability for data lines and sub-pixels becomes insufficient
Solution Approach 1:
By segmenting the multiplexer into specialized driving units, each unit can use simple single-type transistors that are cheaper to manufacture, while the overall system maintains sufficient driving capability through the complementary arrangement of these units.
Solution Approach 2:
The invention changes the operational parameters and configurations of the driving units to optimize driving capability. By adjusting the circuit configuration and signal timing in the first and second driving units, sufficient driving capability is achieved without requiring expensive CMOS transistors.
Data Source
AI summary
A multiplexer is provided herein. The multiplexer has a plurality of first driving units and a plurality of second driving units. Each of the first driving units has a first data voltage input terminal, and each of the second driving units has a second data voltage input terminal. The first data voltage input terminal and the second data voltage input terminal are configured to receive pixel voltage signals with different polarities. In the first driving unit, a voltage difference between a gate and a drain of a transistor is controlled by a first reset signal, wherein the transistor of the first driving unit is coupled to the first data voltage input terminal and a first data line. In the second driving unit, a voltage difference between a gate and a drain of a transistor is controlled by a second reset signal, wherein the transistor of the second driving unit is coupled to the second data voltage input terminal and a second data line.