Display Panel Notch Layout for Bonding Resistance Measurement
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Solution Overview
Problem
The bonding resistance between the display panel and the chip on film affects the performance of display devices, leading to potential performance issues and inefficiencies in manufacturing.
Innovation Solution
A display device with a notch structure in the display panel and substrates, incorporating test pads and test points to monitor and manage bonding quality, allowing for precise measurement of bonding resistance and improving reliability and manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If bonding resistance is increased to a reference value or higher, then measurement capability is improved, but display device performance deteriorates
Solution Approach 1:
The patent applies preliminary action by forming test pads and connection pads on the chip on film before the bonding process. These test structures are pre-configured to enable subsequent bonding resistance measurements without interfering with the actual display device operation. The test pads are positioned and connected in advance, allowing measurement capabilities to be established before performance degradation can occur.
Solution Approach 2:
The patent segments the chip on film into functional regions: driving elements for display control and separate test pads/connection pads for bonding resistance measurement. This segmentation allows the measurement function to be separated from the display function, enabling independent optimization. The test structures are divided into distinct pads and connection paths that can be measured without affecting the display performance of the main chip areas.
2Reliability
If test pads and connection pads are added to the chip on film, then bonding quality monitoring capability is improved, but chip on film area is reduced
Solution Approach 1:
The patent applies local quality by positioning test pads and connection pads in specific localized regions of the chip on film, particularly at end portions. These test structures are concentrated in areas where they can effectively monitor bonding quality without occupying excessive space. The connection pads are strategically placed to connect with corresponding test pads on the display panel, creating localized measurement paths that minimize area consumption while maximizing monitoring effectiveness.
Solution Approach 2:
The patent utilizes the two-dimensional layout of the chip on film efficiently by arranging test pads and connection pads in a planar configuration that optimizes space usage. The test structures are distributed across the surface of the chip on film in a manner that leverages the available area without requiring additional vertical stacking or three-dimensional complexity. This dimensional arrangement allows multiple test points to be incorporated while maintaining a compact overall footprint.
3Productivity
If bonding resistance measurement structures are incorporated, then manufacturing efficiency is improved through quality control, but device complexity is increased
Solution Approach 1:
The patent implements self-service by enabling automatic bonding resistance measurement through the integrated test pads and connection pads. The measurement capability is built into the chip on film structure itself, allowing the device to self-diagnose bonding quality without requiring external complex testing equipment or manual inspection procedures. This self-contained measurement system streamlines the manufacturing process by providing immediate feedback on bonding quality directly from the chip structure.
Solution Approach 2:
The patent applies universality by designing the test pads and connection pads to serve multiple functions: they facilitate bonding resistance measurement, enable quality control during manufacturing, and can potentially be used for other diagnostic purposes. These multi-functional structures are integrated into the chip on film in a way that they contribute to both display operation and quality measurement, reducing the need for separate dedicated testing components and thereby managing overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the reliability and manufacturing efficiency of display devices by effectively monitoring and managing bonding resistance, ensuring uniform quality and identifying bonding issues.
Implementation Method 1
The chip on film and the display panel may be compressed together, and the display panel and the chip on film may be electrically connected by the conductive particles contained in the adhesive resin
Implementation Method 2
the display panel and the chip on film may be electrically connected by the conductive particles contained in the adhesive resin
Data Source
AI summary
A display device includes a display panel including a non-bonding area formed at an end portion thereof and defining first and second sides of the end portion the display panel; a first substrate having a notch formed therein to correspond to the non-bonding area, and includes a driving element for driving the display panel; and a second substrate connected with a second end portion of the first substrate, wherein the display panel includes a first-1 test pad at the first side of the panel, the first substrate includes a first-1 connection pad bonded with the first-1 test pad, a second-1 connection pad connected with the first-1 connection pad through a first line, the second substrate includes a second-1 test pad bonded with the second-1 connection pad, and a first test point connected with the second-1 test pad, and a portion of the first line overlapping the driving element.