Display Substrate Pad Layout for Slim Bezel Bonding Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in display panel manufacturing is to reduce the defect rate in the bonding area while minimizing the bezel area, as finer pitch pads can lead to bonding defects and require a large-area bonding, which is difficult to achieve without increasing the risk of shorts.
Innovation Solution
The implementation of a display device design that includes a display substrate with multiple signal lines and pads on different layers, connected by first and second connection circuit boards bonded to different surfaces of the main circuit board, using anisotropic conductive films and metal paste, and a sealing member to minimize physical interference and enhance bonding strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If finer pitch pads are used to reduce bezel area, then the display area increases, but the bonding defect rate increases
Solution Approach 1:
The patent utilizes the third dimension (vertical stacking) by bonding connection circuit boards to both the front and rear surfaces of the main circuit board. This dimensional transition allows pads to be arranged in a stacked configuration rather than only in planar arrays, enabling finer pitch without increasing bonding area while maintaining reliable electrical connections.
Solution Approach 2:
The patent divides the bonding function into multiple segments by using separate first and second connection circuit boards bonded to different surfaces of the main circuit board. This segmentation allows independent optimization of bonding areas on each surface, reducing the total bonding area required while maintaining all necessary electrical connections.
2Reliability
If larger bonding area is used to reduce defects, then bonding reliability improves, but the bezel area increases
Solution Approach 1:
The invention transitions from two-dimensional planar bonding to three-dimensional stacked bonding by utilizing both front and rear surfaces of the main circuit board. This allows high-density pad arrangements with finer pitch while keeping the bonding area compact, thereby reducing bezel area without compromising bonding reliability.
Solution Approach 2:
The patent changes the spatial arrangement parameter of pads from planar distribution to vertical stacking configuration. This parameter change enables the same number of electrical connections to be achieved with smaller bonding area, reducing bezel width while maintaining bonding reliability through proper stacking design.
3Reliability
If multiple connection circuit boards are used to connect pads, then electrical connectivity improves, but device complexity increases
Solution Approach 1:
The patent merges the functions of multiple connection circuit boards by bonding them to both surfaces of the main circuit board in an integrated stacked configuration. This combining approach achieves comprehensive electrical connectivity for all pads while presenting a unified compact structure, reducing the perceived complexity despite the increased number of connection components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces the planar area and size of the bonding area, minimizing defects and interference between connection circuit boards, thereby achieving a slim bezel area with improved bonding strength and reduced gap between the circuit boards.
Implementation Method 1
an anisotropic conductive film bonding the first pad to the first connection circuit board
Data Source
AI summary
A display device includes a display substrate, a main circuit board, and first and second connection circuit boards. The display substrate includes a base layer, an insulating layer on the base layer, a first signal line on the base layer, a second signal line on the base layer, a first pad exposed from the insulating layer and connected to the first signal line, and a second pad connected to a side surface of the second signal line and disposed on a side surface and a bottom surface of the base layer. The first connection circuit board electrically connects the first pad and the main circuit board, and the second connection circuit board electrically connects the second pad and the main circuit board.


