Display Panel Pad Layout to Prevent High-Voltage Line Shorts
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Solution Overview
Problem
As the resolution of display panels increases, the narrow gaps between signal lines in display devices lead to a higher likelihood of defects such as burnt or short circuits due to adjacent signal characteristics, affecting the stability of operation.
Innovation Solution
A display panel design that includes a low-potential pad between adjacent high-potential voltage lines to reduce the risk of short circuits and enable stable operation at low power by arranging pads with reflected signal characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the resolution of display panels is increased, then the image quality is improved, but the gap between signal lines narrows leading to higher defect rates
Solution Approach 1:
A low-potential pad is introduced as an intermediary element between adjacent high-potential voltage lines. This mediator pad acts as a buffer zone that prevents direct interaction between the high-potential signals, thereby eliminating the risk of short circuits while allowing the signal lines to maintain narrow spacing for high resolution display
2Measurement precision
If signal lines are arranged with narrow gaps to maintain high resolution, then the display quality is improved, but the risk of short circuits and burnt defects increases
Solution Approach 1:
The pad arrangement is designed with local quality differentiation: low-potential pads are strategically positioned between high-potential pads, creating zones of different electrical characteristics in specific locations. This localized arrangement provides targeted protection against short circuits at critical interfaces while maintaining overall signal line density for high resolution
3Productivity
If alternating driving signals are applied to adjacent pads, then the signal transmission efficiency is improved, but the likelihood of burnt defects and short circuits increases
Solution Approach 1:
Adjacent pads are assigned the same potential level (either all high-potential or all low-potential) rather than alternating potentials. This equipotential arrangement eliminates potential differences between adjacent pads, preventing current leakage and burnt defects while still allowing efficient signal transmission through the pad structure
Data Source
AI summary
A display panel comprises a substrate including a display area where a plurality of subpixels are disposed, a gate driving circuit disposed in a non-display area outside the display area to supply a plurality of scan signals to the plurality of subpixels, and a plurality of pads disposed in the non-display area and coupled with a plurality of signal lines electrically connected to the gate driving circuit and an electrostatic discharge unit, wherein the plurality of pads include a clock pad connected with a clock signal line, a first line pad connected with a plurality of first power lines and where at least one low-potential signal line is disposed between adjacent gate high-potential voltage lines among the plurality of first power lines, and a second line pad connected with a plurality of second power lines.