Display Panel Shift Register Layout for Frame-Region Antistatic Protection
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Solution Overview
Problem
Existing display panels are prone to damage due to static charges transferred from the frame region to the display region, affecting user experience and panel quality.
Innovation Solution
The display panel incorporates N-level shift registers with transistors having active layers of varying sizes in the frame region, where the first preset active layer has a larger area than the second and third preset active layers, increasing resistance and blocking static charges, thereby reducing damage to the display region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the display panel uses conventional transistors with uniform active layer areas in the frame region, then the manufacturing process is simple, but static charges are transferred from the frame region to the display region causing panel damage
Solution Approach 1:
The patent applies local quality by differentiating the active layer areas of transistors based on their functional locations. Transistors in the frame region (first transistors) have larger active layer areas compared to transistors in the display region (second transistors). This local differentiation enhances antistatic capability in the frame region where static charge accumulation is most problematic, while maintaining appropriate transistor sizes in the display region for optimal display performance.
Solution Approach 2:
The patent implements parameter changes by varying the active layer area parameter of transistors according to their location. Specifically, the active layer area of first transistors in the frame region is designed to be larger than that of second transistors in the display region. This parameter modification increases resistance in the frame region, thereby blocking static charge transfer and improving overall panel reliability.
2Reliability
If the first preset active layer area is increased to block static charges, then static charge transfer is reduced, but the transistor size and occupied area increase
Solution Approach 1:
The patent confines the increased active layer area to specific locations (frame region transistors) rather than uniformly increasing all transistor sizes. This localized approach ensures that antistatic capability is enhanced where most needed while minimizing the overall area increase and maintaining display region performance.
Solution Approach 2:
The patent selectively modifies the active layer area parameter for first transistors in the frame region while keeping second transistor areas optimized for display functions. This targeted parameter change achieves the antistatic effect without unnecessarily increasing the total transistor area across the entire panel.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the antistatic capability of the frame region, reducing the likelihood of static charge transfer to the display region, thus improving the display panel's quality and user experience.
Implementation Method 1
an area of the first preset active layer is greater than an area of the second preset active layer, and the area of the first preset active layer is greater than an area of the third preset active layer
Data Source
AI summary
A display panel and a display device are provided. The display panel includes at least one driving circuit and at least one pixel circuit. A driving circuit provides a driving signal for a pixel circuit. The driving circuit includes N-level shift registers cascaded with each other, where N is greater than or equal to two. A shift register includes at least one first active layer, and an active layer with a largest area is a first preset active layer. The pixel circuit includes at least one second active layer, where an active layer with a largest area among active layers containing silicon is a second preset active layer, and an active layer with a largest area among active layers containing oxide semiconductor is a third preset active layer. The first preset active layer has an area greater than the second preset active layer and the third preset active layer.