Display Panel Bezel Narrowing via Pixel Circuit Relocation
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Solution Overview
Problem
In large-sized spliced display devices, the light-emitting regions of adjacent display panels are separated by bezels, resulting in an obvious splicing gap that negatively affects the display effect due to the wide lower bezel required for accommodating pins and fan-out lines, making it difficult to reduce bezel width without causing signal interference.
Innovation Solution
The display panel design includes first and second pixel rows with sub-pixels and spacing regions, where the first pixel circuit is moved from the outer side of the first light-emitting device to an inner spacing region, allowing the bezel width to be narrowed, and the position of the second pixel circuit is adjusted to accommodate the second light-emitting device, thereby reducing the visual splicing gap and providing enough space for pins without increasing the design size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the lower bezel width is increased to accommodate pins and fan-out lines, then the pins can be properly connected without signal interference, but the splicing gap between adjacent display panels becomes more obvious
Solution Approach 1:
The pixel circuit is relocated from the traditional lower bezel area to the spacing region between pixel rows, effectively moving the circuit placement to a different spatial dimension (from peripheral bezel to internal spacing). This dimensional shift allows the lower bezel to be narrowed significantly while still accommodating all necessary circuit components, thereby reducing the splicing gap between adjacent panels without compromising signal connection reliability
Solution Approach 2:
The display panel structure is segmented into distinct functional zones: the light-emitting area, the spacing regions between pixel rows for circuit placement, and the minimized bezel areas. By segmenting the circuit placement location from the traditional bezel region to the inter-row spacing, the design achieves both compact bezel width and reliable signal connections
2Object-affected harmful factors
If the bezel width is reduced to minimize splicing gaps, then the display effect is improved, but there is insufficient space to accommodate pins and fan-out lines
Solution Approach 1:
The circuit layout transitions from a peripheral bezel-based arrangement to an internal spacing-region arrangement. By utilizing the spacing regions between pixel rows as the new dimension for circuit placement, the design achieves compact bezel width while providing sufficient space for pins and fan-out lines within the panel's internal structure
Solution Approach 2:
Different regions of the display panel are assigned different functions: the spacing regions between pixel rows are specifically designed to accommodate circuit components, while the bezel areas are minimized for aesthetic purposes. This local differentiation of functional zones allows the system to meet both compact size requirements and circuit accommodation needs
3Device complexity
If the pixel circuit is positioned at the outer side of the light-emitting device, then the layout is simplified, but the bezel width must be increased
Solution Approach 1:
Instead of placing the pixel circuit at the outer side of the light-emitting device (traditional approach), the design inverts this arrangement by positioning the pixel circuit at the inner side, within the spacing region between pixel rows. This inversion allows the bezel width to be minimized while still maintaining proper circuit layout and connectivity
Data Source
AI summary
Provided are a display panel and a spliced display device. The display panel includes first and second edges, first and second pixel rows, and first spacing regions. The first pixel row is adjacent to the first edge and includes first sub-pixels and each including a first light-emitting device and a first pixel circuit. The second pixel row includes second sub-pixels and each including a second light-emitting device and a second pixel circuit. The first spacing region is located at a side of the second pixel row close to the first edge. The second pixel rows include a second A pixel row adjacent to the first pixel row. The first pixel circuit is located in the first spacing region corresponding to the second A pixel row, and the second pixel circuit is located at a side of the second light-emitting device close to the first edge.