Display Panel Binding Layer Layout for Borderless Circuit Connection

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Solution Overview

Problem

In LED display technology, the existing methods for creating borderless displays often damage the array circuit layer during the process of forming holes and connecting it with the binding layer, hindering the development of frameless or borderless displays.

Innovation Solution

A method where a substrate is provided with a driving circuit layer comprising a binding layer, a display base, and an array circuit layer stacked in that order, with the binding layer located between the display base and the substrate. The substrate is removed to expose the binding layer, allowing for direct connection of the array circuit layer to the binding layer through through holes, preventing damage during the hole-forming process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the binding layer is disposed on the back of the substrate and conductive material is filled in through holes after the array circuit layer is disposed, then the binding layer and array circuit layer can be electrically connected, but the array circuit layer is damaged by the processes of forming holes or setting the binding layer

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoiddamage to array circuit layer
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by disposing the binding layer on the substrate before forming the through holes and filling conductive material. Specifically, the binding layer is formed on the substrate surface, then through holes are formed penetrating the binding layer and substrate, and finally conductive material is filled to establish electrical connection. This sequence prevents damage to the array circuit layer that would occur if holes were formed after the array circuit layer was already in place.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent inverts the conventional process sequence by placing the binding layer on the substrate first rather than on the back of the substrate after array circuit layer formation. This inversion of the process order allows the through holes to be formed through the binding layer and substrate to the array circuit layer without damaging the array circuit layer, as the binding layer serves as a protective and structural foundation during the hole-forming process.

Inventive Principle:
Principle #13The other way round (Inversion)

2Ease of manufacture

If a through hole is formed on the substrate and conductive material is filled to connect the binding layer and array circuit layer, then electrical connection is achieved, but the process causes damage to the array circuit layer

Engineering Contradiction:
Improvemanufacturing process feasibilityVSAvoidarray circuit layer integrity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The binding layer is formed on the substrate before the through holes are created. This preliminary positioning of the binding layer provides a stable structure during the hole-forming process, allowing precise control of the through hole formation and conductive material filling while protecting the array circuit layer from damage.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11955590B2Display panel and method for making the same
Publication Date: 2024.04.09 HKC CORP LTD
  • US11955590B2 patent drawing
  • US11955590B2 patent drawing
  • US11955590B2 patent drawing

AI summary

The present disclosure provides a display panel and a method for making the display panel. The method for making the display panel includes: providing a substrate; preparing a driving circuit layer on one side of the substrate; the driving circuit layer includes a binding layer, a display base and an array circuit layer which are stacked, and the binding layer is located between the display base and the substrate. Removing the substrate and the binding layer is exposed; binding the external control unit on the binding layer.