Display Panel Wiring Structure for IC Bonding Crack Prevention
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Solution Overview
Problem
Flexible OLED display panels in foldable products suffer from high panel crack detection failure rates due to cracks occurring during the IC bonding process, which can lead to undetected panel defects and deterioration over time, affecting image quality and reliability.
Innovation Solution
The display panel incorporates a stress equalization structure with auxiliary lines and bumps to equalize stress during bonding, reducing gap sizes and minimizing deformation, thereby preventing cracks in the inorganic insulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the wiring region is designed with dummy bumps and gap regions to accommodate IC bonding, then the IC bonding process can be performed, but cracks occur in the inorganic insulating layer during bonding
Solution Approach 1:
The patent applies local quality by introducing a stress equalization structure specifically in the second gap region where stress concentration occurs. This structure includes auxiliary lines and auxiliary blocks that are strategically positioned to equalize stress locally during IC bonding, preventing cracks in the inorganic insulating layer without affecting the overall wiring region design.
Solution Approach 2:
The stress equalization structure acts as a pre-prepared cushioning mechanism that anticipates stress concentration during IC bonding. By incorporating auxiliary lines and blocks beforehand in the gap region, the patent prevents crack formation before it occurs, ensuring reliable bonding without subsequent panel defects.
2Area of stationary object
If the gap region size is reduced to improve panel density, then more wiring can be packed, but stress concentration increases during bonding
Solution Approach 1:
The patent changes the structural parameters of the gap region by introducing stress equalization structures (auxiliary lines and blocks) that modify the stress distribution characteristics. This allows the gap region to maintain smaller dimensions for higher density while preventing stress concentration through the added structural elements that redistribute mechanical stress.
3Reliability
If auxiliary lines are added to equalize stress, then crack prevention is improved, but wiring density may be reduced
Solution Approach 1:
The auxiliary lines and blocks are placed locally only in the second gap region where stress concentration occurs, rather than throughout the entire wiring region. This localized approach provides crack prevention where needed while minimizing the impact on overall wiring density and structure complexity.
Solution Approach 2:
The patent applies partial action by adding stress equalization structures only to the extent necessary (in the second gap region) to prevent cracks, rather than excessively throughout the entire wiring region. This balanced approach achieves crack prevention while maintaining acceptable wiring density.
Data Source
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AI summary
Provided are a display panel and a display device. The display panel comprises: a display area, having multiple sub-pixels; and a wiring area, located on one side of the multiple sub-pixels. The wiring area comprises an input area, an output area, and a dummy area; the dummy area is located between the input area and the output area; the input area is provided with multiple input protrusions; the output area is provided with multiple output protrusions; the dummy area is provided with multiple dummy protrusions; a first gap area is present between the multiple output protrusions and the multiple dummy protrusions; a second gap area is present between the multiple input protrusions and the multiple dummy protrusions; and the second gap area is provided with a stress equalization structure. Therefore, the generation of cracks in an inorganic insulating layer in an integrated circuit binding process can be mitigated or avoided, thereby avoiding defects caused by cracks in the inorganic insulating layer.