Display Panel Pin-Bonding Structure to Prevent Planarization Peeling
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Solution Overview
Problem
The peeling off of the planarization layer from the insulating and film layers in display panels during reliability verification leads to poor contact between pins in the bonding region, causing reliability issues in display devices, especially in high-temperature and high-humidity environments.
Innovation Solution
The display panel design includes a substrate with sub-pixels, data lines, insulating layers, pins, metal layers, and a planarization layer, where the metal layers are strategically positioned between pins and the planarization layer to enhance adhesion force, and the use of recesses and protrusions in the layers to increase contact area and prevent peeling, thereby improving the bonding force between the planarization layer and adjacent film layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the planarization layer is used to provide a flat surface for pin bonding, then the bonding process is simplified, but the planarization layer peels off from adjacent film layers causing poor pin contact
Solution Approach 1:
The patent introduces a metal layer that is segmented into multiple isolated regions positioned between adjacent pins. Each metal layer region is electrically insulated from neighboring pins but provides mechanical anchoring to the planarization layer, preventing peeling without interfering with pin functionality.
Solution Approach 2:
The patent adds a new structural dimension by introducing the metal layer as an intermediate element between the planarization layer and the pin bonding interface. This additional layer creates a multi-layered structure that addresses the peeling issue without compromising the original bonding function.
2Area of stationary object
If the planarization layer is positioned close to pins for bonding, then bonding area is reduced, but peeling occurs causing poor contact
Solution Approach 1:
The metal layer acts as an intermediary element between the planarization layer and the pins. It provides mechanical support and anchoring points that prevent the planarization layer from peeling away, thereby maintaining reliable pin contact without requiring the planarization layer to be positioned close to the pins.
3Reliability
If metal layers are added to prevent peeling, then adhesion force is improved, but device complexity increases
Solution Approach 1:
The metal layer is not implemented as a continuous layer across the entire device, but rather as localized, isolated regions positioned specifically between adjacent pins. This local implementation provides the necessary adhesion enhancement only where needed, minimizing the impact on overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly enhances the adhesion force between the planarization layer and adjacent film layers, reducing the likelihood of peeling and ensuring reliable contact between pins, thus improving the reliability of the display device under various environmental conditions.
Implementation Method 1
the metal layers are strategically positioned between pins and the planarization layer to enhance adhesion force, and the use of recesses and protrusions in the layers to increase contact area and prevent peeling, thereby improving the bonding force between the planarization layer and adjacent film layers
Data Source
AI summary
A display panel includes: a substrate; a plurality of sub-pixels, located in a display area; a plurality of data lines, located in the display area and a non-display area and electrically connected to the plurality of the sub-pixels; a first insulating layer set, located at one side of the substrate and provided with a plurality of first openings located at intervals in the first region; a plurality of first pins, located in the plurality of the first openings and electrically connected to the data lines; a first metal layer, located between two adjacent first pins and electrically insulated from the two adjacent first pins; a first planarization layer, located at one side of the first metal layer away from the substrate; and a second metal layer, located at one side of the first planarization layer away from the substrate and electrically insulated from the two adjacent first pins.