Display Panel Power Layout for a-Si Charge Balance
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Solution Overview
Problem
Flexible display panels face issues with charge accumulation at the a-Si thin-film layer, leading to leakage and characteristic deviations, resulting in edge bright circles and lines due to uneven charge distribution between the display and edge regions.
Innovation Solution
A display panel design with a power signal layer that alternately outputs positive and negative voltage signals, connected to a power signal terminal, to dissipate charges and reduce accumulation effects, along with auxiliary electrode lines to generate an electric field and balance charge distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a-Si thin-film layers are added under the channel layer to block impurities from the PI film layer, then display quality is improved by preventing afterimage problems, but charge accumulation occurs at the a-Si thin film layer during handling and turnover process
Solution Approach 1:
An auxiliary circuit layer with electrode lines is introduced as an intermediary between the a-Si layer and the environment. These electrode lines generate electric fields that actively manage charge accumulation, preventing the harmful effects while preserving the impurity-blocking function of the a-Si layer.
Solution Approach 2:
The auxiliary circuit layer applies preliminary anti-action by generating electric fields before charge accumulation becomes problematic. During handling and turnover, the electrode lines pre-establish electric fields that prevent excessive charge buildup at the a-Si layer, countering the inevitable charge accumulation process.
2Ease of operation
If PVDD voltage is applied to drive the display, then the display panel operates in touch-and-display state, but charge accumulation in the channel causes leakage and characteristic deviation
Solution Approach 1:
The auxiliary circuit layer acts as an intermediary that mediates between the operating voltage and the thin-film transistor channel. The electrode lines generate electric fields that counterbalance charge accumulation in the channel, allowing PVDD to drive the display while preventing leakage and characteristic deviation.
Solution Approach 2:
The auxiliary circuit layer applies periodic action by continuously adjusting electric fields in response to operating conditions. The electrode lines generate time-varying electric fields that periodically counteract charge accumulation, maintaining transistor stability during continuous display operation.
3Power
If power voltage lines are located in the display region, then the display region receives proper power supply, but charge accumulation effect is stronger in the display region compared to the edge region, causing edge bright circles and lines
Solution Approach 1:
The auxiliary circuit layer applies local quality by providing spatially varying electric fields through the electrode lines. The electric field strength is tailored to match the local charge accumulation characteristics - stronger in the display region where accumulation is more severe, and adjusted for the edge region - thereby achieving uniform brightness compensation across the entire display.
Solution Approach 2:
The auxiliary circuit layer works toward equipotentiality by generating electric fields that balance the potential differences caused by uneven charge accumulation. The electrode lines are configured to create an electric field distribution that compensates for the stronger accumulation in the display region, equalizing the effective potential and eliminating edge bright circles and lines.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves the appearance of edge bright circles and lines, ensuring high display quality by reducing charge accumulation and maintaining uniform brightness across the display region.
Implementation Method 1
auxiliary electrode lines to generate an electric field and balance charge distribution
Data Source
AI summary
A display panel has a display region and a frame region outside the display region. The display region includes a plurality of pixel circuits. The display panel includes a base substrate, a buffer layer, a semiconductor layer, a power signal layer, and an auxiliary circuit layer. The buffer layer is on a side of the base substrate. The buffer layer includes an a-Si layer. The semiconductor layer is on a side of the buffer layer away from the base substrate. The power signal layer is on a side of the semiconductor layer away from the base substrate. The power signal layer includes a plurality of first power voltage lines in the display region, and one first power voltage line of the plurality of first power voltage lines are electrically connected to a corresponding pixel circuit.