Display Panel Scan Control With Clock Gating for Low Frame Rates

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Solution Overview

Problem

In multi-frequency display (MFD) operations, the continuous output of high-frequency and high-voltage-swing clock signals in low frame rate (LFR) areas leads to significant power consumption, undermining the intended power-saving effect.

Innovation Solution

The method involves stopping and restarting the clock signals in LFR areas based on frame rate allocations, using enable signals to control scan signal output, and employing pulse generators to restart the scan pulse shifting when transitioning to high frame rate (HFR) areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the clock signal is continuously output to the display panel to ensure correct scan pulse forwarding in multi-frequency display operations, then the timing requirements for dynamically allocating high frame rate and low frame rate areas are met, but the power consumption increases significantly due to the high-frequency and high-voltage-swing nature of the clock signal

Engineering Contradiction:
Improvetiming requirementVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies periodic action by enabling the clock signal only during specific time periods when scanning high frame rate areas is required, and disabling it during low frame rate area scanning. This periodic activation ensures timing requirements are met when needed while minimizing power consumption during periods when the clock signal is not required for correct scan pulse forwarding.

Inventive Principle:
Principle #19Periodic action

2Use of energy by moving object

If the refresh rate is reduced in low frame rate areas to save power, then power consumption is reduced, but the image quality and refresh performance in high frame rate areas must be maintained

Engineering Contradiction:
Improvepower consumptionVSAvoidframe rate allocation
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The patent segments the display panel into multiple scanning areas with different frame rate requirements (high frame rate areas and low frame rate areas). By dividing the scanning operation into region-specific segments, the system can apply different refresh rates to different areas, thereby reducing overall power consumption while maintaining high image quality in areas that require it.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic frame rate allocation by adjusting the scanning frequency adaptively based on the specific requirements of different display areas. The system dynamically switches between high frame rate and low frame rate scanning modes for different regions, allowing optimal power consumption while maintaining the necessary image quality and responsiveness in high frame rate areas.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12406629B2Method of controlling display panel and display driver circuit and scan control circuit thereof
Publication Date: 2025.09.02 NOVATEK MICROELECTRONICS CORP
  • US12406629B2 patent drawing
  • US12406629B2 patent drawing
  • US12406629B2 patent drawing

AI summary

A method of controlling a display panel which performs a scan operation on an image frame with a first scan setting and a second scan setting includes steps of: outputting a start pulse to the display panel when starting the scan operation; outputting a clock signal to the display panel when the scan operation is in the first scan setting; stopping outputting the clock signal to the display panel when the scan operation is in the second scan setting; and restarting to output the clock signal to the display panel when the scan operation is switched to the first scan setting from the second scan setting. The first scan setting and the second scan setting are for display of the display panel.