Display Panel Clock Line Layout for Electromagnetic Noise Reduction

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Solution Overview

Problem

Electromagnetic noise generated in display apparatuses due to signal lines degrades image quality and causes malfunctions.

Innovation Solution

The display apparatus and panel incorporate a closed loop structure for emission and scan clock lines, with opposite phase clock lines in non-display areas to reduce electromagnetic noise, and control line widths to minimize interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If signal lines are used to transmit various signals in the display apparatus, then the display function is enabled, but electromagnetic noise is generated that degrades image quality and causes malfunctions

Engineering Contradiction:
Improveimage qualityVSAvoidelectromagnetic noise
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A ground line is introduced as an intermediary element between signal lines to provide a reference potential and shield against electromagnetic noise. The ground line acts as a mediator that stabilizes the electrical environment and reduces interference between adjacent signal lines, thereby improving image quality without compromising the signal transmission function.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent converts the harmful electromagnetic noise generated by signal lines into a beneficial shielding effect by strategically arranging ground lines and using the return current paths. The very conductors that generate noise are configured to also provide noise cancellation through controlled impedance matching and differential signaling, turning the harmful electromagnetic fields into a protective shield.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Speed

If clock lines are arranged in parallel to transmit signals efficiently, then signal transmission speed is improved, but electromagnetic interference between lines increases

Engineering Contradiction:
Improvesignal transmission speedVSAvoidelectromagnetic interference
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent applies different spatial arrangements to different regions of the clock line network. In high-interference zones, clock lines are separated by ground lines or routed in differential pairs with increased spacing. In low-interference zones, lines can be closer together to maintain signal integrity. This localized adaptation of line geometry optimizes both transmission speed and interference reduction for each specific region of the display panel.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250232729A1Display apparatus and display panel
Publication Date: 2025.07.17 LG DISPLAY CO LTD
  • US20250232729A1 patent drawing
  • US20250232729A1 patent drawing
  • US20250232729A1 patent drawing

AI summary

A display apparatus comprising a display panel including a plurality of subpixels in a display area, a gate driving circuit disposed along a first direction in a first area of the display panel, a gate clock line disposed along the first direction in the first area, and a second gate clock line disposed along the first direction in the first area, and disposed along a second direction in a second area of the display panel.