Display Panel Common Electrode Insulation Design
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Solution Overview
Problem
Conventional display panels are prone to electrical short circuits between the data line and common electrode layer due to the thin passivation layer being susceptible to physical damage and electrostatic breakdown, which is exacerbated by the use of gold balls in the sealant layer.
Innovation Solution
The display panel design includes a common electrode layer with slits and connections extending into a second area, where the connections are insulated from the rest of the common electrode layer by cutting them at both sides, and a sealant layer with conductive components that electrically connect the common electrode layer to the common electrode signal line layer, reducing the risk of short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a thin passivation layer is used to insulate the data line layer, then the device complexity is reduced, but the reliability deteriorates due to susceptibility to physical damage and electrostatic breakdown
Solution Approach 1:
The patent introduces a sealant layer as an intermediary protective barrier between the data line layer and the common electrode layer. This sealant layer, positioned between the passivation layer and the common electrode layer, acts as an additional protective mediator that shields the thin passivation layer from physical damage and electrostatic breakdown, thereby resolving the contradiction between using a thin passivation layer for simplicity and maintaining reliable electrical insulation.
2Reliability
If gold balls are used in the sealant layer for electrical connection, then the electrical conductivity is improved, but the harmful factors increase due to potential short circuits between data line and common electrode
Solution Approach 1:
The patent segments the sealant layer into distinct functional zones: a first area containing gold balls for electrical connection between the data line layer and common electrode layer, and a second area free of gold balls that serves as an insulating barrier. This segmentation allows the sealant layer to simultaneously provide electrical conductivity where needed while preventing short circuits in other areas, resolving the contradiction between improving electrical connection reliability and reducing short circuit risks.
3Adaptability or versatility
If the common electrode layer extends into the second area, then the functionality is improved, but the risk of short circuit increases due to proximity to data lines
Solution Approach 1:
The sealant layer without gold balls acts as an intermediary insulating barrier that allows the common electrode layer to extend into the second area for improved functionality while preventing direct contact with data lines. This intermediary layer maintains the necessary electrical isolation, resolving the contradiction between expanding electrode coverage and preventing short circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively prevents electrical short circuits by insulating the connections and enhancing the durability of the passivation layer, thereby improving the reliability of the display panel.
Implementation Method 1
an organic electroluminescence layer which emits light when voltage is applied thereto
Implementation Method 2
an encapsulation structure having a bottom encapsulation layer and a top encapsulation layer, each of which includes a plurality of encapsulation layers stacked in an alternating manner
Data Source
Figure 1
Figure 2~3A
Figure 3B~4
AI summary
A display panel including an array substrate (AS) and an opposing substrate (PS) facing the array substrate (AS); a data line layer having a plurality of data lines (106) on the array substrate (AS); a passivation layer (204) on a side of the data line layer proximal to the opposing substrate (PS); a sealant layer (105) on a side of the passivation layer (204) distal to the data line layer, sealing the array substrate (AS) and the opposing substrate (PS) together; the display panel having a first area (A) enclosed by the sealant layer (105) and a second area (B) outside of the first area (A) and the sealant layer (105); the plurality of data lines (106) extending from the first area (A) into the second area (B); and a common electrode layer (206) on a side of the sealant layer (105) distal to the passivation layer (204). The common electrode layer (206) includes a portion having a plurality of connections (C), and a plurality of slits (S) spaced apart from each other by the plurality of connections (C); the plurality of slits (S) and the plurality of connections (C) extending from the first area (A) into the second area (B), each of the plurality of connections (C) is between two adjacent slits (S); each of the plurality of connections (C) has a first portion (C1) in the first area (A) and a second portion (C2) in the second area (B).