Display Panel Conductive Bridge Holes Reduce Capacitive Load
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Solution Overview
Problem
The Gate Driver on Array (GOA) technology faces challenges with excessively large circuit loads in display panel design, which affects product costs and integration.
Innovation Solution
The design includes a first and second substrate with conducting layers, passivation layers, electrode layers, and a liquid crystal layer, featuring conductive bridge holes to reduce capacitive load by transmitting voltage signals through these holes, thereby approximating the medium coefficient of the liquid crystal layer to the dielectric coefficient of a parallel vector, effectively reducing capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If GOA technology is used to integrate gate drive circuit directly on array substrate, then manufacturing procedures are decreased and product costs are reduced, but circuit load becomes excessively large
Solution Approach 1:
The gate drive circuit is divided into multiple scanning line drive circuits, each responsible for a specific scanning line. This segmentation reduces the capacitive load on each individual circuit while maintaining the integrated GOA architecture, resolving the contradiction between manufacturing simplicity and circuit load management
2Ease of manufacture
If GOA technology is used to integrate gate drive circuit directly on array substrate, then product costs are reduced, but circuit load becomes excessively large
Solution Approach 1:
Different regions of the array substrate are assigned different functions: the border region contains the integrated gate drive circuit while the central region contains the pixel array. This local differentiation allows cost-effective integration while managing circuit load through proper spatial distribution of functional elements
3Ease of operation
If conventional gate drive circuit with shift register is used, then continuous drive signals can be generated, but circuit load becomes excessively large
Solution Approach 1:
The shift register function is extracted and integrated directly into the gate drive circuit on the array substrate, eliminating the need for separate external shift register circuits. This extraction reduces overall circuit load while maintaining continuous drive signal generation capability
Data Source
AI summary
This application provides a display panel includes: a first substrate; a first conducting layer formed on the first substrate; a first passivation layer formed on the first conducting layer, and covering the first substrate; a second passivation layer formed on the first passivation layer; and a first electrode layer formed on the second passivation layer, and covering a part of the first conducting layer and the first passivation layer; a second substrate, disposed opposite to the first substrate; a liquid crystal layer, located between the first substrate and the second substrate; and a second electrode layer formed on the second substrate, where a conductive bridge hole is formed on a wire of the first conducting layer, and the first electrode layer is covered on the first conducting layer; and a voltage signal is transmitted to the first electrode layer and the second electrode layer through the conductive bridge hole.