Display Panel Connecting Holes Reduce Wiring Density

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Solution Overview

Problem

Current display panels face issues of dense wirings, small adjustment space for pixel design, and increased crosstalk between circuits due to the bridging method used for connecting signal lines to the semiconductor layer, leading to poor stability.

Innovation Solution

The display panel design incorporates first and second connecting holes positioned on adjacent data lines, allowing direct electrical connection to the semiconductor layer without bridging, with a mirror image arrangement and an insulating layer covering the semiconductor layer to simplify circuit layouts and reduce crosstalk.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If bridging method is used to connect signal lines to semiconductor layer, then signal writing time is improved, but wiring density increases and pixel design space decreases

Engineering Contradiction:
Improvesignal writing timeVSAvoidwiring density
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent transitions from planar bridging connections to vertical through-hole connections by introducing connecting holes that pass through the insulating layer. This dimensional change allows signal lines to connect to the semiconductor layer directly below without requiring lateral bridging structures, thereby reducing wiring density while maintaining efficient signal transmission.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent extracts the bridging connection function by removing it entirely and replacing it with direct vertical connections through connecting holes. This eliminates the need for complex bridging structures and reduces overall wiring complexity in the pixel design.

Inventive Principle:
Principle #2Taking out (Extraction)

2Loss of time

If bridging method is used to connect signal lines, then signal writing time is improved, but crosstalk between circuits increases

Engineering Contradiction:
Improvesignal writing timeVSAvoidcrosstalk between circuits
Core Design Contradiction:
Loss of timeVSObject-generated harmful factors

Solution Approach 1:

The patent removes the bridging connection structures that generate crosstalk and replaces them with isolated vertical connecting holes. This extraction eliminates the source of electromagnetic interference between adjacent circuits while preserving fast signal writing capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

By moving from lateral bridging connections to vertical through-hole connections, the patent spatially separates signal paths in the vertical dimension, reducing electromagnetic coupling and crosstalk between adjacent circuits while maintaining short connection lengths for fast signaling.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Loss of time

If bridging method is used for connecting signal lines, then signal writing time is improved, but stability of display panel decreases

Engineering Contradiction:
Improvesignal writing timeVSAvoidstability of display panel
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent extracts and eliminates the bridging connection method that compromises stability, replacing it with more reliable vertical connecting holes that pass through the insulating layer. This provides more stable mechanical and electrical connections while maintaining fast signal writing performance.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12082457B2Display panel and display device
Publication Date: 2024.09.03 WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO LTD
  • US12082457B2 patent drawing
  • US12082457B2 patent drawing
  • US12082457B2 patent drawing

AI summary

A display panel and a display device are provided, which include a substrate, a plurality of data lines, a semiconductor layer, a first connecting hole, and a second connecting hole. The first connecting hole and the second connecting hole are positioned on two adjacent data lines, and the semiconductor layer in two adjacent areas has a mirror image arrangement with respect to a first direction. Therefore, connecting data signal lines to the semiconductor layer by bridging can be prevented, and problems of dense wirings, small adjustment space for pixel design, and greater crosstalk between circuits can be solved.