Display Panel Demultiplexer Layout for Slim Bezel
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Solution Overview
Problem
Conventional display panels face challenges in efficiently using layout space due to the arrangement of conductive lines, which can hinder slim bezel development and affect signal transmission accuracy, especially in non-rectangular display regions.
Innovation Solution
The use of demultiplexers arranged along the edge of the display region, coupled with a layered circuit structure and grouped data lines, reduces the number and length of conductive lines, ensuring accurate signal transmission while optimizing layout space for non-rectangular shapes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If conductive lines are arranged in a fan-out structure extending along horizontal and vertical directions, then the conductive lines can connect pixel structures to external circuits, but the conductive lines take up significant area of the layout region, hindering slim bezel development
Solution Approach 1:
The patent introduces a third dimension by stacking circuit layers vertically. Conductive lines are distributed across multiple layers (first circuit layer, second circuit layer, third circuit layer) instead of all lying in the same plane. This vertical stacking allows conductive lines to pass through the layout region more efficiently, reducing the horizontal area occupied and enabling slimmer bezels.
Solution Approach 2:
The patent segments the conductive lines into different groups and distributes them across multiple circuit layers. First data lines, second data lines, first scan lines, and second scan lines are assigned to different layers and regions. This segmentation allows for more efficient spatial arrangement and reduces the overall area occupied by conductive lines in the layout region.
2Reliability
If conductive lines are arranged in a fan-out structure, then connectivity is achieved, but the conductive lines become too long, increasing resistance and reducing signal transmission accuracy
Solution Approach 1:
By utilizing vertical stacking of circuit layers, the patent creates direct vertical pathways for signal transmission. Conductive lines can travel shorter vertical distances between layers rather than long horizontal paths, significantly reducing overall line length and associated resistance, thereby improving signal transmission accuracy.
Solution Approach 2:
The patent divides the conductive line network into segmented groups across multiple layers, allowing signals to be transmitted through optimized shorter paths. Each layer contains specific line groups that can be routed more efficiently, reducing total length compared to a single-layer fan-out structure.
3Area of stationary object
If conventional conductive line layout is used, then basic connectivity is achieved, but the layout space is not efficiently used, limiting the visible region of the display panel
Solution Approach 1:
The patent resolves layout space efficiency issues by moving conductive line routing into the vertical dimension through multiple stacked circuit layers. This allows the layout region to be utilized more efficiently, freeing up horizontal space that can be converted into additional visible display area while maintaining all necessary connectivity functions.
Data Source
AI summary
A display panel uses demultiplexers to reduce numbers of data lines, and divides the data lines into groups being coupled to the demultiplexers respectively. The demultiplexers are disposed along an edge of the display region and compliant to the outline of the display panel, so as to save the layout space. In addition, the layout of control lines of the demultiplexers can be configured to more effectively utilize the layout space in the layout region. Furthermore, the aforementioned layout helps reduce the length of the conductive lines, and improves the transmission of signals in the conductive lines.