Display Panel Driver Circuit with Cascaded Shift Registers
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Solution Overview
Problem
Display panels experience fluctuations in gate driving signals due to parasitic capacitance, affecting display quality, especially when different regions require varying image refresh rates.
Innovation Solution
A driver circuit with N-stage cascaded shift register units, including an initial control module, stage transmission output module, driving control module, active auxiliary module, and driving output module, ensures independent signal transmission and flexible control of gate driving signals, preventing fluctuations and enhancing stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the driver circuit outputs a valid pulse of the gate driving signal for an extended period, then the display can maintain different refresh rates for different regions, but fluctuations occur in the gate driving signal due to parasitic capacitance, affecting display quality
Solution Approach 1:
The driver circuit is divided into N-stage cascaded shift register units, where each stage can be independently controlled. This segmentation allows different regions to have different refresh rates while preventing signal fluctuations through localized control, resolving the contradiction between adaptability and reliability.
Solution Approach 2:
The shift register units output gate driving signals at different frequencies based on regional requirements. By using periodic action with variable frequencies, the system achieves different refresh rates for different regions while maintaining signal stability through controlled periodic output rather than extended continuous output.
2Duration of action of moving object
If the gate driving signal is transmitted for an extended period to maintain display refresh, then the signal becomes susceptible to interference from parasitic capacitance, causing signal floating and fluctuations
Solution Approach 1:
The shift register units continuously generate gate driving signals at appropriate frequencies without extended idle periods. This continuous useful action prevents signal floating by maintaining active signal levels, reducing the impact of parasitic capacitance interference while achieving the required display refresh duration.
Solution Approach 2:
The cascaded shift register structure provides inherent feedback mechanisms where each stage's output feeds the next stage. This feedback ensures signal stability by continuously regenerating the gate driving signal at the correct frequency and level, preventing signal degradation and floating caused by parasitic capacitance during extended operation.
Data Source
AI summary
Provided are a display panel and a display device. The display panel includes a driver circuit. The driver circuit includes N-stage cascaded shift register units. In the same shift register unit, the initial control module is configured to at least receive an input signal and a first clock signal and control a signal of a first initial node and a signal of a second initial node. The stage transmission output module is configured to at least receive the signal of the first initial node, the signal of the second initial node, a first level signal, and a second level signal and control a stage transmission signal. The driving control module is configured to at least receive the signal of the first initial node, the signal of the second initial node, and a driving control signal and control a signal of a first driving node.