Display Panel Driving Method for High Refresh Rate Cost Reduction
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Solution Overview
Problem
Current display panel designs for high refresh frequencies require double data lines, increasing the number of film layers and MASK processes, leading to higher costs.
Innovation Solution
A display panel with a matrix of pixel circuits, data lines, write control lines, compensation control lines, and driving circuits where the pulse width of compensation control signals is N times that of write control signals, and the write control signals on adjacent lines do not overlap, allowing each row to correspond to one data line without increasing the number of film layers or MASK processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If double data lines are used for high refresh frequency, then the refresh frequency is improved, but the number of film layers and MASK processes increases
Solution Approach 1:
The patent merges the functions of two data lines into one data line by using a single data line to sequentially write data to odd-row pixel circuits and even-row pixel circuits at different time periods. This is achieved through the first and second write control lines that control different switch transistors in different rows, allowing one data line to serve multiple purposes and eliminate the need for separate odd and even data lines, thereby reducing film layers and MASK processes while maintaining high refresh frequency
Solution Approach 2:
The patent implements periodic action by dividing the refresh cycle into distinct time periods: a first time period for writing data to odd-row pixel circuits using the first write control line, and a second time period for writing data to even-row pixel circuits using the second write control line. This periodic switching allows a single data line to handle data writing for all rows sequentially, achieving high refresh frequency without requiring double data lines, thus reducing device complexity
2Productivity
If double data lines are used for high refresh frequency, then the refresh frequency is improved, but the manufacturing cost increases
Solution Approach 1:
The patent merges the functions of two data lines into one data line by using a single data line to sequentially write data to odd-row pixel circuits and even-row pixel circuits at different time periods. This is achieved through the first and second write control lines that control different switch transistors in different rows, allowing one data line to serve multiple purposes and eliminate the need for separate odd and even data lines, thereby reducing film layers and MASK processes while maintaining high refresh frequency
Solution Approach 2:
The patent makes the single data line universal by enabling it to perform multiple functions: it writes data to odd-row pixel circuits during the first time period and writes data to even-row pixel circuits during the second time period. This multi-functionality eliminates the need for separate data lines for different row types, reducing manufacturing complexity and cost while achieving high refresh frequency performance
3Reliability
If compensation control signal pulse width is extended to ensure sufficient charging, then the charging completeness is improved, but the risk of data write dislocation increases
Solution Approach 1:
The patent segments the refresh cycle into distinct time periods: a first time period dedicated to writing data to odd-row pixel circuits and a second time period dedicated to writing data to even-row pixel circuits. By segmenting the data writing process and assigning specific time windows to specific row groups, the patent ensures that extended compensation control signal pulse widths for sufficient charging do not cause data write dislocation, as each row group has its designated writing window controlled by specific write control lines
Solution Approach 2:
The patent implements preliminary action by completing the data writing to odd-row pixel circuits in the first time period before initiating data writing to even-row pixel circuits in the second time period. This preliminary completion of writing operations for one row group ensures that when compensation control signals are extended to ensure sufficient charging, there is no risk of data write dislocation because the writing sequence is pre-established and time-separated
Data Source
AI summary
Disclosed are a display panel, a driving method therefor, a display device. The display panel includes pixel circuits, data lines, write control lines, compensation control lines, a first driving circuit connected to compensation control lines, a second driving circuit connected to write control lines. Each column of pixel circuits corresponds to one data line, each row of pixel circuits corresponds to one write control line, one compensation control line. The first driving circuit outputs compensation control signals to pixel circuits by compensation control lines, second driving circuit outputs write control signals to pixel circuits by write control lines. The pulse width of compensation control signals is N times pulse width of write control signals, write control signals on two adjacent write control lines do not overlap, an overlap time of compensation control signals on two adjacent compensation control lines is (N−1)/N of pulse width of compensation control signals.