Display Panel Driving Transistor Reset for Residual Potential Control

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Solution Overview

Problem

Existing display panels face challenges in optimizing the device performances of driving transistors, which affects the light-emitting effect of light-emitting elements due to inconsistent residual potentials across different pixel circuits.

Innovation Solution

A display panel design that includes a pixel circuit with a driving module, a gate reset module, a threshold compensation module, and a data writing module, where a three-terminal reset operation is performed to ensure consistent initial states for the driving module across different pixel circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional pixel circuit design is used, then the structure is simple, but the device performance of the driving transistor is inconsistent due to residual potentials

Engineering Contradiction:
Improvedevice performance consistencyVSAvoidpixel circuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing a three-terminal reset operation on the driving transistor before the data writing phase. This reset operation pre-establishes a consistent initial state for the driving transistor by clearing residual potentials from the previous frame, ensuring that all pixel circuits start from the same baseline condition regardless of their previous display states. This preliminary reset action eliminates the inconsistency caused by varying residual potentials without requiring fundamental changes to the pixel circuit structure.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the driving transistor is not reset, then the circuit operation is fast, but residual potentials cause inconsistent light-emitting effects across different pixel circuits

Engineering Contradiction:
Improvelight-emitting consistencyVSAvoidreset operation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges multiple reset operations into a single integrated three-terminal reset process. Instead of performing separate reset operations for different terminals of the driving transistor, the invention combines the reset of the gate terminal, source terminal, and drain terminal into one coordinated operation that occurs simultaneously or in tight sequence. This merging approach achieves comprehensive resetting for consistent light-emitting effects while minimizing the total time required compared to multiple separate reset steps.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If multiple scan lines with overlapping valid levels are used, then the driving module can be reset to consistent initial state, but the control signal complexity increases

Engineering Contradiction:
Improveinitial state consistencyVSAvoidcontrol signal structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing the scan lines to serve multiple functions simultaneously. The first, second, and third scan lines are configured to output valid levels that overlap in time, allowing each scan line to participate in both the reset operation and the data writing operation. This multi-functionality enables the same scan line infrastructure to accomplish both the three-terminal reset and the subsequent data writing without requiring additional dedicated control lines, thereby achieving initial state consistency while avoiding excessive control signal complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250095584A1Display panel, method for driving the same, display apparatus
Publication Date: 2025.03.20 WUHAN TIANMA MICROELECTRONICS CO LTD SHANGHAI BRANCH
  • US20250095584A1 patent drawing
  • US20250095584A1 patent drawing
  • US20250095584A1 patent drawing

AI summary

Display panel, method for driving the same and display apparatus are provided. The display panel includes pixel circuits that includes a driving module; a gate reset module electrically connected to a first scan line, a first reset line, and a control terminal of the driving module; a threshold compensation module electrically connected to a second scan line, a second terminal of the driving module, and the control terminal of the driving module; and a data writing module electrically connected to a third scan line, a data line and a first terminal of the driving module. Within one frame, at least a part of the third valid level is located between the first valid level and the second valid level, at least a part of the second valid level is located between the third valid level and the fourth valid level, and the fifth valid level overlaps the fourth valid level.