Display Panel Dummy Load Fanout Oscillation Control
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Solution Overview
Problem
Liquid crystal display (LCD) apparatuses experience display errors such as horizontal line errors due to oscillations caused by dummy channels not connected to loads, which affect the output of driving chips and result in reduced display quality.
Innovation Solution
A display panel design with dummy loads in the peripheral area and a fanout portion that connects dummy pads to these loads, ensuring each group of dummy pads receives signals of the same polarity, thereby preventing chip output oscillation and improving display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If dummy channels are not connected to loads, then device complexity is reduced, but output oscillation occurs causing display errors
Solution Approach 1:
The patent extracts the dummy load connections from the main data lines by creating separate dedicated dummy data lines that extend from the data driving chip through the fanout portion to the dummy loads in the peripheral area. This separation allows dummy channels to be properly terminated without interfering with the main data signal paths, preventing oscillation while maintaining clean signal distribution.
Solution Approach 2:
The fanout portion acts as an intermediary structure that distributes signals from the data driving chip to both the main data lines and the dummy loads. It provides a dedicated pathway through fanout connecting lines that branch off to connect dummy pads to dummy loads, ensuring proper signal termination without creating interference with the primary data transmission paths.
2Reliability
If dummy loads are added to prevent oscillation, then display quality is improved, but device complexity increases
Solution Approach 1:
The patent merges the dummy load functionality into the existing peripheral area structure of the display panel. The dummy loads are integrated with the peripheral circuitry rather than being separate components, and the fanout connecting lines are combined with the existing fanout structure that already distributes signals across the panel. This integration minimizes additional complexity while achieving oscillation prevention.
Solution Approach 2:
The patent resolves complexity by transitioning from a two-dimensional chip mounting approach to a three-dimensional signal distribution architecture. The fanout portion creates vertical and lateral signal paths that branch from the chip surface through multiple layers to reach dummy loads positioned in the peripheral area, utilizing spatial dimensions to organize connections efficiently without increasing planar complexity.
Data Source
AI summary
A display panel includes a plurality of data lines, a plurality of gate lines, a plurality of dummy loads, a pad portion and a fanout portion. The data lines are disposed in a display area, on which a plurality of pixels are disposed. The gate lines are disposed in the display area and cross the data lines. The dummy loads are disposed in a peripheral area surrounding the display area. The pad portion is disposed in the peripheral area and includes signal pads and dummy pads. The fanout portion includes a first fanout line portion connecting the data lines to the signal pads, and a second fanout line portion connecting the dummy loads to the dummy pads.