Display Panel Edge Overlap Layout for Particle-Free Splicing
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Solution Overview
Problem
Large-sized display panels formed by splicing multiple display panels are prone to display defects due to splicing gaps and conductive particles generated during the cutting process, which affect display quality.
Innovation Solution
The display panel design includes a conductive structure on one side of the active area with its edge flush with the substrate edge, and the opposite substrate shields the array substrate during cutting to prevent conductive particles from attaching, allowing for narrow bezels and improved splicing gaps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If multiple display panels are spliced to form large-sized display devices, then the display area is increased, but splicing gaps and conductive particles are generated affecting display quality
Solution Approach 1:
The patent converts the harmful conductive particles generated during cutting into a beneficial shielding structure. By placing a conductive structure (remaining portion of second gate driving circuit) on the array substrate at the cutting edge, and positioning the opposite substrate to overlap and shield this conductive structure, the harmful particles are blocked from attaching to the display panel, thus converting the cutting process harm into a protective feature.
Solution Approach 2:
The conductive structure acts as an intermediary between the cutting process and the display panel. It serves as a shielding layer that intercepts conductive particles before they can contaminate the display panel, while the opposite substrate provides additional shielding by overlapping the conductive structure. This intermediary mechanism protects the display quality during the splicing process.
2Length of stationary object
If the conductive structure edge is flush with the substrate edge, then narrow bezels are achieved, but the conductive structure may be exposed to conductive particles
Solution Approach 1:
The patent positions the conductive structure edge flush with the substrate edge to achieve narrow bezels, while simultaneously using the opposite substrate to overlap and shield the conductive structure. This converts the potential vulnerability of the flush-edge design into a protected configuration, where the opposite substrate acts as a shield against conductive particles.
Solution Approach 2:
The patent solves the bezel width vs. protection contradiction by introducing a dimensional overlap in the vertical direction. The opposite substrate extends beyond the array substrate edge in the vertical direction, creating a three-dimensional shielding configuration that protects the conductive structure without increasing the horizontal bezel width.
3Object-affected harmful factors
If the opposite substrate overlaps the array substrate on the conductive structure side, then conductive particles are shielded, but the splicing gap may increase
Solution Approach 1:
The patent resolves the contradiction between shielding and splicing gap by utilizing vertical dimension overlap rather than horizontal extension. The opposite substrate overlaps the array substrate in the vertical direction to provide shielding, while maintaining alignment in the horizontal direction to minimize splicing gaps. This dimensional strategy achieves both protection and narrow bezels.
Solution Approach 2:
The patent applies local quality by providing shielding only where conductive particles are generated (at the cutting edge with conductive structure), rather than extending the opposite substrate uniformly across the entire panel. The overlap is localized to the specific region needing protection, minimizing impact on splicing gaps in other areas.
Data Source
AI summary
A display panel having an active area includes: an array substrate and an opposite substrate disposed opposite to the array substrate. The array substrate includes a first substrate and a conductive structure disposed on the first substrate. The conductive structure is located on a side of the active area. On the side where the conductive structure is located, an edge of an orthographic projection of the opposite substrate on a plane where the array substrate is located is located outside an edge of the array substrate.