Display Panel Test Circuit Layout for EMI and Crack Detection

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Solution Overview

Problem

The existing display panel technologies face electromagnetic interference issues due to the high-frequency switching of multiplexers, which are typically located near integrated circuits, affecting their operation.

Innovation Solution

The display panel design positions multiplexers between the test circuit and sub-pixels, and includes a test circuit with specific transistor configurations and signal transmission lines to reduce electromagnetic interference, with a test method and crack detection mechanism using selection signals to identify panel cracks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If multiplexers are located near integrated circuits to reduce the number of data signal lines, then cost is reduced, but electromagnetic interference affects the operation of integrated circuits

Engineering Contradiction:
ImprovecostVSAvoidelectromagnetic interference
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent divides the circuit board into distinct functional regions: a first region for integrated circuits, a second region for multiplexers, and a third region for test circuits. This spatial segmentation isolates the multiplexers (which generate electromagnetic interference during high-frequency switching) from the integrated circuits, thereby reducing electromagnetic interference while maintaining cost benefits through continued use of multiplexer-based data transmission

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a fourth region between the first region (integrated circuits) and the second region (multiplexers) that serves as an intermediary zone. This intermediate region acts as a buffer or shield that further reduces electromagnetic interference from multiplexers to integrated circuits, while the multiplexers continue to function as data signal transmission devices connecting to display area circuits

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If multiplexers are positioned away from test circuits to reduce electromagnetic interference, then integrated circuit operation is stabilized, but testing capability is reduced

Engineering Contradiction:
Improveoperational stabilityVSAvoidtesting capability
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent creates separate functional regions: the second region for multiplexers is positioned away from the first region (integrated circuits) to reduce electromagnetic interference and stabilize operation, while a third region is dedicated to test circuits. This segmentation allows multiplexers to operate stably away from sensitive integrated circuits while test circuits remain accessible for testing operations

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The test circuits in the third region are designed to test multiple components including multiplexers, data signal lines, and display area circuits. This multi-functional test capability ensures that even though multiplexers are positioned away from integrated circuits, comprehensive testing remains possible through the versatile test circuit system

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12150369B2Display panel, display device, test method and crack detection method
Publication Date: 2024.11.19 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US12150369B2 patent drawing
  • US12150369B2 patent drawing
  • US12150369B2 patent drawing

AI summary

The present disclosure provides a display panel, a display device, a test method, and a crack detection method. The display panel includes: a base substrate including a display area and a peripheral area; a plurality of sub-pixels in the display area; a plurality of data signal lines in the display area and electrically connected to the plurality of sub-pixels; a plurality of signal transmission lines in the peripheral area and electrically connected to the plurality of data signal lines; a plurality of multiplexers in the peripheral area; and a first test circuit on a side of the plurality of multiplexers away from the plurality of sub-pixels. The first test circuit includes a plurality of test components, each of at least a portion of the plurality of test components being electrically connected to at least two multiplexers.