Display Panel ESD Protection Circuit Design
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Solution Overview
Problem
Existing display panel technologies face challenges in effectively managing electrostatic charges across signal lines of varying areas, leading to potential damage from electrostatic discharge (ESD) due to mismatched ESD protection circuit parameters.
Innovation Solution
The display panel incorporates distinct ESD protection circuits with varying channel width-to-length ratios for first and second signal lines, ensuring each signal line is connected to conductive patterns through switching units comprising multiple thin film transistors, allowing for efficient electrostatic charge dissipation based on the line's area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If signal lines of different areas use the same ESD protection circuit parameters, then device complexity is reduced, but electrostatic charge dissipation effectiveness deteriorates
Solution Approach 1:
The patent applies local quality by configuring different ESD protection circuit parameters for different signal lines based on their specific areas. First signal lines with larger areas are equipped with ESD protection circuits having larger channel width-to-length ratios, while second signal lines with smaller areas use ESD protection circuits with smaller channel width-to-length ratios. This localized optimization ensures each signal line's ESD protection is matched to its actual charge accumulation characteristics, resolving the contradiction between uniformity and effectiveness.
2Reliability
If ESD protection circuits with larger channel width-to-length ratios are used for all signal lines, then electrostatic charge dissipation is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent implements parameter changes by adjusting the channel width-to-length ratio parameter of ESD protection circuits according to the area of each signal line. Instead of using a fixed parameter for all signal lines, the patent varies this critical parameter to match the charge dissipation needs of different signal line areas, thereby achieving effective ESD protection without unnecessary complexity.
3Object-affected harmful factors
If ESD protection circuits are customized for each signal line area, then electrostatic discharge protection is enhanced, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies segmentation by dividing signal lines into different categories (first signal lines with larger areas and second signal lines with smaller areas) and assigning appropriate ESD protection circuit configurations to each category. This segmentation approach reduces the number of unique configurations needed compared to fully customized designs, thereby lowering manufacturing precision requirements while still providing tailored ESD protection for each signal line type.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces the risk of ESD damage by ensuring that electrostatic charges are properly conducted from signal lines to conductive patterns, enhancing the anti-static properties of the display panel and preventing charge accumulation.
Implementation Method 1
Each first switching unit is configured to close on a line between a corresponding first signal line and a corresponding first conductive pattern... Each second switching unit is configured to close on a line between a corresponding second signal line and a corresponding second conductive pattern
Data Source
AI summary
A display panel includes first signal lines, second signal lines, first conductive patterns, second conductive patterns, at least one first switching unit and at least one second switching unit. An area of the first signal line is greater than that of the second signal line. Each first signal line is electrically connected to at least one first conductive pattern through at least one first switching unit. Each second signal line is electrically connected to at least one second conductive pattern through at least one second switching unit. The first switching unit includes at least one first thin film transistor, and the second switching unit includes at least one second thin film transistor. A channel width-to-length ratio of each first thin film transistor is greater than that of each second thin film transistor.