Display Panel Flicker Reduction via Transistor Bias Adjustment
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Solution Overview
Problem
Electronic products using organic self-luminous technology experience screen flicker when displaying slow-motion images or static images, affecting visual experience due to significant differences in brightness rising rates between adjacent frames.
Innovation Solution
The display panel incorporates a pixel circuit with a driving transistor, a second transistor, a third transistor, and a first light-emission controlling module. The panel includes a reset and adjustment phase in the holding frame to adjust the bias state of the driving transistor, reducing the difference in brightness rising rates between frames.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a lower refresh rate is used to reduce power consumption, then energy efficiency is improved, but screen flicker occurs due to significant differences in brightness rising rates between adjacent frames
Solution Approach 1:
The patent applies preliminary action by introducing a reset and adjustment phase before the light emitting phase in the holding frame. This preliminary phase adjusts the bias state of the driving transistor to ensure consistent brightness rising rates, thereby eliminating flicker before it occurs during the actual display period.
Solution Approach 2:
The patent changes the parameter of the driving transistor's bias state by adjusting the voltage at the source terminal through the third transistor during the reset and adjustment phase. This parameter adjustment ensures that the brightness rising rate remains consistent across adjacent frames, resolving the flicker issue while maintaining low refresh rate operation.
2Reliability
If a higher refresh rate is used to ensure smooth display images, then visual quality is improved, but power consumption increases
Solution Approach 1:
The patent uses preliminary action by performing a reset and adjustment phase before the light emitting phase. This preliminary adjustment of the driving transistor's bias state ensures consistent brightness rising rates, allowing the system to operate at lower refresh rates while maintaining visual quality.
3Device complexity
If the bias state of the driving transistor is not adjusted in the holding frame, then device complexity is reduced, but brightness rising rates differ significantly between adjacent frames causing flicker
Solution Approach 1:
The patent applies universality by making the second transistor serve dual functions: during the data writing phase, it provides the data signal to the source terminal; during the reset and adjustment phase, it provides the adjusting voltage. This multi-functionality reduces the need for additional dedicated transistors, thereby limiting the increase in device complexity while achieving flicker elimination.
Solution Approach 2:
The patent introduces a reset and adjustment phase as a preliminary action before the light emitting phase. This preliminary adjustment of the driving transistor's bias state ensures consistent brightness rising rates across frames, eliminating flicker without requiring complex continuous adjustment mechanisms throughout the entire display period.
Data Source
AI summary
A display panel and a display device are provided. The display panel includes at least one pixel circuit and a light emitting element. One pixel circuit includes a driving transistor, a second transistor, a third transistor, and a first light-emission controlling module. The second transistor is connected between a data line and a source of the driving transistor and is configured to provide a data signal. The third transistor is connected between a voltage adjusting signal line and the source of the driving transistor and is configured to provide an adjusting voltage. The first light-emission controlling module is connected between a first power supply terminal and the source of the driving transistor and is configured to provide a power supply voltage. The power supply voltage provided by the first power supply terminal is VP, and the adjusting voltage is VJ, where VP<VJ≤VP+3.5V, and/or VP+1V<VJ.