Display Panel Wiring Layout for Reduced Non-Display Area
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Solution Overview
Problem
The existing display panels have a limited reduction in non-display area due to the presence of wiring members like tape carrier packages or flexible printed circuit boards, which occupy additional space and restrict the minimization of the pad area.
Innovation Solution
The display panel design incorporates an array substrate with a thin film transistor, pixel electrode, and signal input pad on a base substrate, where the signal input pad is supported by an organic polymer pattern and connected to a flexible printed circuit board, allowing for a reduced pad area by overlapping the seal pattern and eliminating the need for extra space under the array substrate for the wire member.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a wiring member such as a tape carrier package or flexible printed circuit board is used to connect the display panel and external circuit module, then electrical connection is achieved, but the non-display area increases due to the space occupied by the wiring member
Solution Approach 1:
The patent merges the wiring member with the array substrate by directly attaching the flexible printed circuit board to the array substrate, eliminating the need for separate wiring members like tape carrier packages. This integration reduces the non-display area while maintaining electrical connection functionality.
Solution Approach 2:
The patent utilizes the vertical dimension by routing signal wires through the thickness of the array substrate via contact holes, allowing electrical connections to be made at the edge of the display panel rather than requiring lateral space for wiring members, thus reducing the non-display area.
2Area of stationary object
If the pad area is reduced to minimize the non-display area, then the display area ratio improves, but the electrical connection to external circuit module becomes more difficult
Solution Approach 1:
The patent transitions from a planar pad structure to a three-dimensional connection structure by forming contact holes through the array substrate and routing signal wires vertically, enabling electrical connections with minimal pad area while maintaining manufacturing feasibility.
Solution Approach 2:
The patent nests the signal wire within the contact hole structure, allowing the electrical connection to be embedded within the substrate thickness rather than requiring external pad space, thus reducing pad area while maintaining connection capability.
Data Source
AI summary
A display panel includes an array substrate, an opposite substrate facing the array substrate, and a liquid crystal layer disposed between the array substrate and the opposite substrate. The array substrate includes a display area and a non-display area surrounding the display area, and the non-display area includes a first non-display area disposed adjacent to a side portion of the display area and a second non-display area other than the first non-display area. The first non-display area overlaps the opposite substrate. The array substrate and the opposite substrate have the same or substantially the same area and a wire member is disposed under the array substrate to be connected to an external circuit module. Accordingly, the display panel does not need an extra space for the wire member, and thus the non-display area is reduced.