Display Panel Gate Driving Circuit Narrow Border Design
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional driving circuits in display panels occupy significant space in the border area, making it difficult to design narrow-border or borderless display panels.
Innovation Solution
A novel gate driving circuit design where the gate driving circuit is positioned in the peripheral area, coupled to the pixel array via gate lines and wirings, with different-sized transistors in output buffer circuits to ensure similar driving capabilities for multiple gate lines, allowing for efficient signal transmission across varying distances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If driving circuits are disposed in the border area at two lateral sides of the substrate, then the gate driving signals can be provided to the pixel array, but the space in the border area is occupied, making it difficult to design narrow-border or borderless display panels
Solution Approach 1:
The gate driving circuit is moved from the lateral border areas to the peripheral area at the bottom of the pixel array, changing the spatial dimension where the driving circuit is located. This allows the border area width to be reduced while the driving circuit remains functional, positioned in the peripheral area rather than occupying the lateral borders.
2Reliability
If different-sized transistors are used in output buffer circuits for different gate lines, then driving capabilities can be equalized despite varying transmission distances, but the device complexity increases
Solution Approach 1:
Different-sized transistors are selectively applied to different output buffer circuits based on their specific requirements. Transistors with different channel widths (e.g., 120μm, 100μm, 80μm, 60μm) are used for different gate lines depending on the transmission distance and required driving capability, allowing each local region to have optimized characteristics rather than using a uniform design throughout.
Data Source
AI summary
A display panel has a display area and a peripheral area disposed adjacent to the display area. The display panel includes a pixel array, a plurality of gate lines, a plurality of first wirings, and a first gate driving circuit. The pixel array is disposed in the display area. The gate lines are coupled to the pixel array. The plurality of first wirings are coupled to the pixel array. The first gate driving circuit is disposed in the peripheral area and coupled to the pixel array via at least a portion of the plurality of first wirings and at least a portion of the plurality of gate lines. In the display area, the plurality of gate lines extend along a first direction and the plurality of first wirings extend along a second direction, and the first direction and the second direction are different.