Display Panel Gate Signal Timing for Brightness Uniformity

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Solution Overview

Problem

Liquid crystal display panels using Half-Source Driver technology often experience uneven brightness due to vertical bright-dark lines caused by differences in charging voltages between adjacent pixel columns, resulting from positive and negative polarity conversion of data lines.

Innovation Solution

A display panel design where the timing control chip adjusts the turn-on time of gate activating signals for adjacent pixel columns, ensuring the first column has a longer turn-on time than the second column, thereby increasing the charging voltage of the first column to match that of the second column, eliminating the brightness difference and vertical bright-dark lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If Half-Source Driver technology is used to reduce source driving integrated chips, then cost is reduced, but vertical bright-dark lines appear causing uneven brightness

Engineering Contradiction:
ImprovecostVSAvoidbrightness uniformity
Core Design Contradiction:
Ease of manufactureVSIllumination intensity

Solution Approach 1:

The patent changes the timing parameter of gate activating signals by setting different turn-on times for first and second columns of pixels. Specifically, the turn-on time of the gate activating signal for the first column is set greater than that of the second column, which compensates for the voltage difference caused by data line polarity conversion and eliminates the vertical bright-dark lines while maintaining the cost benefits of Half-Source Driver technology

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If data line polarity conversion is implemented to drive adjacent pixel columns, then circuit complexity is reduced, but charging voltage difference occurs between columns

Engineering Contradiction:
Improvecircuit complexityVSAvoidcharging voltage uniformity
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary anti-action by pre-compensating for the voltage difference through timing adjustment. Before the data line polarity conversion can cause a charging voltage difference, the system has already set different turn-on times for the gate activating signals of adjacent columns, which counteracts the upcoming voltage imbalance and ensures uniform charging across all pixel columns

Inventive Principle:
Principle #9Preliminary anti-action

3Ease of operation

If uniform turn-on time is applied to all pixel columns, then control simplicity is maintained, but brightness unevenness occurs due to polarity conversion effects

Engineering Contradiction:
Improvecontrol simplicityVSAvoidbrightness uniformity
Core Design Contradiction:
Ease of operationVSIllumination intensity

Solution Approach 1:

The patent applies local quality by making the gate activating signal parameters location-dependent. Different turn-on times are assigned to different column groups (first column versus second column) based on their specific positions and the polarity conversion patterns of their shared data lines. This localized differentiation eliminates brightness unevenness while maintaining simplicity in the overall control architecture

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11430400B2Display panel, driving method and display device
Publication Date: 2022.08.30 HKC CORP LTD
  • US11430400B2 patent drawing
  • US11430400B2 patent drawing
  • US11430400B2 patent drawing

AI summary

The present application discloses a display panel, a driving method and a display device. The display panel includes: a substrate, where the substrate is provided thereon with a plurality of data lines, a plurality of gate lines, and a plurality of pixels; each row of pixels includes a plurality of pixel groups, and each pixel group includes a first column of pixels and a second column of pixels; and a timing control chip configured to control the turn-on time of gate activating signals of the first column of pixels and the second column of pixels. The turn-on time of the gate activating signal of the first column of pixels is greater than the turn-on time of the gate activating signal of the corresponding second column of pixels.