Display Panel Stacked Conductive Layers for Faster Gate Switching
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Solution Overview
Problem
The RC loading of gate lines in display panels results in slow response speed and short response time for switching transistors, affecting display performance, particularly in large-size panels with high pixel density.
Innovation Solution
The display panel design includes a first conductive layer with a molybdenum layer and a third conductive layer composed of titanium and aluminum layers, reducing the square resistance of signal lines and minimizing impedance load, thereby enhancing the response speed of switching transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If gate lines are used to provide gate driving signals to switching transistors, then the display panel can be driven, but the RC loading of gate lines causes slow response speed and short response time
Solution Approach 1:
The patent introduces a third conductive layer above the first conductive layer to form signal lines. This vertical stacking creates a multi-dimensional signal transmission path, allowing the gate driving signal to be transmitted through the third conductive layer's via holes directly to the switching transistor gates, bypassing the RC loading limitations of traditional planar gate line structures.
Solution Approach 2:
The third conductive layer uses a composite material structure (titanium-aluminum-titanium layers) to achieve low square resistance. This composite material approach minimizes the impedance load on the gate driving signal, thereby improving the response speed and reducing the response time of the switching transistor.
2Productivity
If traditional single-layer conductive structure is used, then the device structure is simple, but the square resistance is high causing slow signal transmission
Solution Approach 1:
The patent transitions from a single-layer conductive structure to a multi-layer conductive structure by introducing a third conductive layer above the first conductive layer. This vertical dimensionality change enables lower square resistance and faster signal transmission, directly improving the writing speed of data, initialization, and reference voltage signals.
Solution Approach 2:
The third conductive layer employs a titanium-aluminum-titanium composite material structure to achieve low square resistance. This composite material design significantly reduces the impedance load, thereby increasing the writing speed of various signals despite the increased structural complexity.
3Speed
If high square resistance conductive layer is used, then the manufacturing process is simple, but the impedance load is high affecting response speed
Solution Approach 1:
The third conductive layer uses a titanium-aluminum-titanium composite material structure to achieve low square resistance and minimize impedance load. This composite material approach improves the response speed of switching transistors while remaining compatible with existing thin-film transistor manufacturing processes.
Solution Approach 2:
The patent applies different material compositions to different functional requirements: the first conductive layer (molybdenum) provides basic conductivity, while the third conductive layer (titanium-aluminum-titanium) provides low square resistance for high-speed signal transmission. This local quality differentiation optimizes both manufacturing ease and performance.
Data Source
AI summary
The display panel comprises a pixel driving circuit; the pixel driving circuit comprises a switching transistor; the display panel further comprises a base substrate, a first conductive layer, and a third conductive layer which are sequentially stacked; the first conductive layer is located on one side of the base substrate, and at least part of the first conductive layer is used for forming a gate of the switching transistor; the third conductive layer is located on the side of the first conductive layer facing away from the base substrate, the third conductive layer comprises a second signal line, and the second signal line is connected to the gate of the switching transistor by means of a via hole; the square resistance of the third conductive layer is less than the square resistance of the first conductive layer.


