Display Panel Hollow Area Data Line Routing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge is to increase the screen occupancy ratio of display panels while maintaining normal data signal transmission, as non-display holes require data lines to be cut and wound around the periphery, increasing the non-display area and reducing the screen occupancy ratio.
Innovation Solution
A display panel design with a hollow area divided into four areas, where data lines in the second display area are connected to multiple data lines in the third display area through signal switching circuits, allowing for time division signal transmission, reducing the need for winding and minimizing the border width of the hollow area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data lines are wound around the periphery of the non-display hole to maintain normal transmission, then data signal transmission is maintained, but the non-display area increases and screen occupancy ratio decreases
Solution Approach 1:
The display area is divided into four distinct regions (first, second, third, and fourth display areas) separated by the hollow area. Data lines are segmented and routed through different paths in each region, with the second data line connecting to multiple third data lines through switching circuits, allowing efficient signal distribution without winding around the hollow area periphery.
Solution Approach 2:
The patent introduces signal switching circuits that enable multi-dimensional data line connections. Instead of simply winding data lines around the hollow area periphery in a single dimension, the switching circuits create multiple connection paths between data lines in different display areas, effectively utilizing spatial arrangement to reduce the border width.
2Reliability
If data lines are wound around the periphery of the non-display hole, then data signal transmission is maintained, but the border width of the hollow area increases
Solution Approach 1:
Multiple data lines (specifically, n third data lines) are merged and connected to a single second data line through signal switching circuits. This merging approach allows multiple data signal paths to share common routing space, reducing the overall border width required around the hollow area while maintaining complete data signal transmission functionality.
Solution Approach 2:
The signal switching circuits serve multiple functions: they connect data lines between different display areas, enable time division signal transmission, and reduce the number of separate data line paths needed. This multi-functionality allows the patent to achieve compact border design without compromising data transmission reliability.
3Area of stationary object
If the screen occupancy ratio is increased by reducing non-display area, then screen occupancy ratio improves, but data line routing becomes more difficult
Solution Approach 1:
The display area is segmented into four regions with the hollow area forming natural boundaries. This segmentation provides clear routing paths for data lines in each region, making the manufacturing process easier while still maximizing the screen occupancy ratio. The segmented structure eliminates the need for complex winding routes.
Solution Approach 2:
Signal switching circuits act as intermediary components that facilitate data line connections between different display areas. These intermediaries simplify the routing process by providing standardized connection points and switching mechanisms, making data line routing easier even as the screen occupancy ratio is maximized.
Data Source
AI summary
A display panel has a display area and a non-display area surrounding the display area. The display area has a first side and a second side opposite to the first side, and includes: a hollow area having first and second edges; and first to fourth display areas. The display panel includes: a driving chip arranged in the non-display area close to the first side; first data lines arranged in the first display area; second data lines arranged in the second display area; third data lines arranged in the third display area; and fourth data lines arranged in the fourth display area. The first edge is close to the driving chip and the second edge is away from the driving chip, and each second signal line is connected to at least two third data lines through a signal switching circuit.