Display Panel Insulation Structure for Parasitic Capacitance Reduction
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Solution Overview
Problem
In display panels with active matrix driving, parasitic capacitance causes significant delays in current delivery to light-emitting elements, affecting the display's ability to reach predetermined current values, especially in current-designating systems where weak currents are required.
Innovation Solution
The display panel incorporates a pixel circuit with a driving transistor connected to a light-emitting element, data lines covered by a first and second insulation film, where the relative dielectric constants and thicknesses of these films are optimized to minimize parasitic capacitance, ensuring that the total parasitic capacitance is within specific limits, thereby reducing delays in data line transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If insulation films with high dielectric constants are used to ensure electrical isolation, then insulation performance is improved, but parasitic capacitance increases causing current delay
Solution Approach 1:
The patent changes the dielectric constant parameter of the insulation films to reduce parasitic capacitance. Specifically, it uses a first insulation film with dielectric constant 3.0≤εa≤6.4 and a second insulation film with 2.0≤εb≤3.6, optimizing the balance between electrical isolation and current response time
Solution Approach 2:
The patent employs a composite insulation structure with two different insulation films having different dielectric constants. The first insulation film (higher ε) provides strong electrical isolation, while the second insulation film (lower ε) reduces parasitic capacitance, creating a composite system that balances both requirements
2Reliability
If thicker insulation films are used to improve insulation, then electrical isolation is improved, but parasitic capacitance increases causing slower current response
Solution Approach 1:
The patent optimizes the thickness parameters Da and Db of the insulation films along with their dielectric constants to control parasitic capacitance. The specific thickness values are determined to balance insulation performance with current response speed requirements
3Illumination intensity
If weak currents are used in current-designating systems to achieve optimal brightness, then display quality is improved, but the system becomes more sensitive to parasitic capacitance delays
Solution Approach 1:
The patent converts the harmful effect of parasitic capacitance into a controllable parameter by carefully selecting insulation film materials and thicknesses. The low-dielectric-constant second insulation film specifically addresses the delay issue while maintaining the weak current operation needed for optimal display brightness
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses delays in data line transmission, ensuring that the current values reach the required levels promptly, maintaining optimal brightness and performance in the display panel.
Implementation Method 1
parasitic capacitance causes significant delays in current delivery to light-emitting elements
Implementation Method 2
where... ∈a denotes a relative dielectric constant of the first insulation film, ∈b denotes a relative dielectric constant of the second insulation film
Data Source
AI summary
A display panel including a plurality of pixels. Each pixel includes: a light emitting element; a pixel circuit having a driving transistor connected to the light emitting element in series; a data line to which a data current is supplied through the pixel circuit; a scanning line for selecting the pixel circuit; a first insulation film to cover the data line; and a second insulation film made of a material different from the first insulation film, to cover the data line and the first insulation film, wherein the following expression is satisfied.Ctotal20≦ɛ0ɛaɛbɛaDb+ɛbDa≦Ctotal5Ctotal: parasitic capacitance of whole path to data line through pixel circuit; ∈0: vacuum dielectric constant; ∈a: relative dielectric constant of first insulation film; Da: first insulation film thickness; ∈b: relative dielectric constant of second insulation film; Db: second insulation film thickness.