Display Panel Light-Shielding Layer Width Ratio
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Display panels with top gate TFT structures experience light leakage currents due to ineffective light-shielding, which compromises the electronic properties of TFTs, as existing light-shielding layers fail to adequately block scattering light from the backlight module.
Innovation Solution
A display panel design incorporating a substrate with a first light-shielding layer, a semiconductor layer, an insulating layer, a gate line, and a metal layer, where the light-shielding layer has an overlapping region with the metal layer, and the ratio of the overlapping region's width to the minimum distance between the metal layer's edge and the contact hole is between 0.2 and 0.8, effectively blocking scattered light and minimizing parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a light-shielding layer is disposed under the active layer to block light, then light leakage current is reduced, but the electronic properties of TFTs deteriorate due to excessive parasitic capacitance
Solution Approach 1:
The light-shielding layer is designed with spatially varying properties: it has a first width in the overlapping region with the gate line and a second width in the overlapping region with the metal layer, where the ratio between these widths is controlled between 0.2 and 0.8. This local variation in dimensions allows the light-shielding layer to provide adequate light blocking where needed while minimizing parasitic capacitance in critical electrical regions.
Solution Approach 2:
The invention controls the geometric parameters of the light-shielding layer, specifically the ratio of the first width (in gate line overlapping region) to the second width (in metal layer overlapping region) within the range of 0.2 to 0.8. This parameter optimization balances light shielding effectiveness with electrical performance, reducing parasitic capacitance while maintaining light blocking capability.
2Object-affected harmful factors
If the light-shielding layer is made larger to improve light blocking, then light leakage current is reduced, but device complexity increases
Solution Approach 1:
Rather than uniformly increasing the light-shielding layer size, the invention applies local quality by creating specific width variations in different regions. The layer has a first width under the gate line and a second width under the metal layer, with their ratio controlled between 0.2 and 0.8. This targeted approach provides effective light blocking only where necessary while maintaining structural simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces light leakage currents and parasitic capacitance, maintaining the electronic properties of TFTs while preventing excessive parasitic capacitance, thereby enhancing the performance of display panels.
Implementation Method 1
a first light-shielding layer on the substrate... effectively blocking scattered light
Implementation Method 2
a ratio of the first width to the second width is in a range between 0.2 and 0.8... preventing excessive parasitic capacitance
Data Source
AI summary
A display panel that includes a first light-shielding layer, a semiconductor layer, an insulating layer, and a gate line are successively on a substrate is provided. A contact hole passes through the insulating layer to expose the semiconductor layer. A metal layer is on the insulating layer and electrically connected to the semiconductor layer through the contact hole. The first light-shielding layer includes an overlapping region that overlaps with the metal layer and has a first width in a first direction. A minimum distance in the first direction between the edge of the metal layer adjacent to the gate line and the bottom of the contact hole is defined as a second width. The first direction is substantially perpendicular to an extending direction of the gate line, and a ratio of the first width to the second width is in a range between 0.2 and 0.8.


