Display Panel Link Lines Reducing Bezel Size and Crosstalk
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Solution Overview
Problem
Existing display panels face challenges in reducing the bezel size due to the arrangement of link lines for data signal transmission in the non-active area, which also leads to increased horizontal crosstalk deviation.
Innovation Solution
A data link structure is implemented where link lines are connected within the active area of the display panel, with each link line having the same overlapping area with gate lines, reducing the need for diagonal extensions and thereby minimizing the bezel size and horizontal crosstalk deviation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If link lines are arranged in the non-active area to transmit data signals, then data transmission function is achieved, but the bezel size cannot be reduced
Solution Approach 1:
The link lines are configured to extend in the row direction (horizontal dimension) within the active area, rather than extending diagonally from the non-active area. This dimensional change allows the link lines to connect data lines at multiple positions along the row direction, enabling data transmission while maintaining a small bezel size.
Solution Approach 2:
The link lines are integrated within the active area structure, combining the data transmission function with the pixel array layout. By placing link lines in the same plane as the pixel electrodes and extending them in the row direction, the design merges the previously separate non-active area routing with the active area structure, eliminating the need for large bezels.
2Reliability
If link lines extend diagonally from non-active area to data lines, then data connection is achieved, but horizontal crosstalk deviation increases
Solution Approach 1:
The link lines extend in the row direction (horizontal dimension) rather than diagonally, changing the spatial orientation of signal transmission. This horizontal extension perpendicular to the gate line direction minimizes overlapping area and parasitic capacitance, thereby reducing horizontal crosstalk while maintaining reliable data transmission.
Solution Approach 2:
The link lines are positioned to have uniform, controlled overlapping areas with gate lines at different locations. By optimizing the local configuration of link lines in the row direction, the design ensures consistent electrical characteristics and minimizes crosstalk variation across different pixel columns, improving overall signal reliability.
Data Source
AI summary
A display device may include a substrate including an active area on which a plurality of subpixels are arranged and a non-active area including a pad area located in a column direction from the active area, a plurality of gate lines disposed in the active area and each extending in a row direction, a plurality of data lines disposed in the active area and each extending in the column direction, a plurality of pads disposed in the pad area, and a plurality of link lines electrically connecting the plurality of pads and the plurality of data lines. Each of the plurality of link lines may include a row-direction link line part extending in the row direction and a column-direction link line part extending in the column direction. The row-direction link line parts included in each of the plurality of link lines may have lengths corresponding to each other.