Flexible Display Panel Layout With Fewer Masks and Precise TFT Alignment
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing display panel manufacturing processes face challenges in achieving high speed and reliability, particularly in flexible and foldable designs, where the complexity of thin-film transistor connections and the number of masks used in the manufacturing process can lead to misalignment and increased costs.
Innovation Solution
The display panel design incorporates a connection electrode on the organic layer connected to the output electrode of the first thin-film transistor through a contact hole, with a passivation layer covering the signal line and oxide semiconductor patterns, reducing the number of masks needed and enhancing flexibility by using inorganic layers like silicon oxide and silicon nitride alternately, and optimizing the placement of signal lines and electrodes to minimize misalignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the number of masks used in the manufacturing process is reduced, then manufacturing complexity and cost are decreased, but manufacturing precision may be compromised
Solution Approach 1:
The patent combines multiple mask alignment functions into a unified reference electrode structure. The reference electrode is designed with multiple alignment marks that serve different alignment purposes simultaneously, allowing multiple layers to be aligned using a single reference structure rather than requiring separate masks for each alignment operation.
Solution Approach 2:
The reference electrode structure performs multiple functions: it serves as both a functional electrode in the device and as a universal alignment reference for multiple subsequent layers. The alignment marks on the reference electrode are used by different masks during the manufacturing process, making this single structure a multi-functional element that replaces what would traditionally require multiple separate alignment features.
2Area of moving object
If thin-film transistors are closely connected to increase pixel density, then display resolution is improved, but manufacturing precision requirements increase due to alignment difficulty
Solution Approach 1:
The patent segments the alignment reference system into distinct alignment marks positioned at specific locations relative to the reference electrode. These segmented alignment marks provide localized reference points that facilitate precise alignment of different structural layers, enabling accurate positioning even when transistors are closely spaced.
Solution Approach 2:
The reference electrode with its alignment marks is formed early in the manufacturing process, before the closely-spaced transistor structures are created. This preliminary establishment of the alignment reference system allows subsequent layers to be accurately aligned to the high-density transistor layout, ensuring manufacturing precision is maintained despite the increased pixel density.
Data Source
Figure 1A
Figure 1B
Figure 2
AI summary
A display panel includes a base layer including a first area and a second area. At least one inorganic layer disposed on the base layer overlaps the first area and the second area. The at least one inorganic layer comprises a lower groove. A first thin-film transistor is disposed on the at least one inorganic layer. The first thin-film transistor includes a silicon semiconductor pattern. A second thin-film transistor is disposed on the at least one inorganic layer. The second thin-film transistor includes an oxide semiconductor pattern. A plurality of insulation layers overlap the first area and the second area. An upper groove extends from the lower groove. A signal line is electrically connected to the second thin-film transistor. An organic layer is disposed in the lower groove and the upper groove. A light emitting element is disposed on the organic layer.