Display Panel Mask Simplification for Transistor Precision
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Solution Overview
Problem
The existing display panel manufacturing processes are complex and costly due to the need for multiple masks to form transistors with different semiconductor patterns and capacitors, which affects the electrical and display characteristics.
Innovation Solution
A display panel design that incorporates a silicon semiconductor transistor and an oxide semiconductor transistor with a simplified process, using a single insulating layer between the light emitting element and connection electrodes, and a titanium nitride layer in the gate electrode, reducing the number of masks required and improving capacitance and response speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple masks are used to form transistors with different semiconductor patterns and capacitors, then manufacturing precision can be maintained, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent merges the formation of different semiconductor patterns (silicon and oxide) and capacitor structures into a single mask process. By designing the mask to simultaneously define both transistor active regions and capacitor electrodes, the invention reduces the number of masking steps while maintaining pattern precision, directly addressing the contradiction between manufacturing precision and process complexity
Solution Approach 2:
The mask structure is designed to serve multiple functions: it defines transistor active regions, forms capacitor electrodes, and establishes the spatial relationship between different device components all in one step. This multi-functional mask design eliminates the need for separate masks for each feature, reducing process complexity while preserving manufacturing precision
2Reliability
If multiple insulating layers are used between light emitting element and connection electrodes, then electrical isolation is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The invention extracts and eliminates redundant insulating layers from the structure, retaining only the essential single insulating layer that provides necessary electrical isolation between the light emitting element and connection electrodes. This simplification maintains adequate electrical isolation while significantly reducing device complexity and manufacturing steps
Solution Approach 2:
Instead of adding multiple insulating layers to improve electrical isolation, the invention inverts the approach by using a single strategically positioned insulating layer with optimized material properties and thickness. This inverted strategy achieves the same isolation function with simpler structure, addressing the contradiction between reliability and device complexity
3Productivity
If simplified manufacturing process is used, then manufacturing cost and time are reduced, but manufacturing precision may deteriorate
Solution Approach 1:
The mask is designed with preliminary consideration of all feature definitions and spatial relationships, allowing all transistor and capacitor patterns to be formed in a single masking operation. This preliminary design approach enables the simplified single-step process to achieve the same precision that would otherwise require multiple sequential steps, maintaining manufacturing precision while improving productivity
Data Source
AI summary
A display panel includes a first transistor including a first semiconductor pattern including one of a silicon semiconductor and an oxide semiconductor and a first gate electrode overlapping the first semiconductor pattern in a plan view, a second transistor including a second semiconductor pattern different from the first semiconductor pattern and a second gate electrode overlapping the second semiconductor pattern in the plan view, a first upper electrode overlapping the first gate electrode in the plan view, a first connection electrode electrically connected to the first semiconductor pattern via a first contact hole through at least one insulating layer, and a light emitting element disposed on the first connection electrode. A single insulating layer is disposed between the light emitting element and the first connection electrode, and the first connection electrode is electrically connected to the light emitting element via a second contact hole through the single insulating layer.


