Display Panel Metal Lines with Varied Widths for Time Constant Uniformity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Large LCD display panels face issues with insufficient charging and discharging time constants for pixel units far from source and gate driving chips, leading to poor display quality due to the design of metal lines, which conventional solutions like material replacement or dual-sided driving methods fail to adequately address as panel sizes increase.
Innovation Solution
The implementation of display panels with metal lines of varying widths, where the line widths or thicknesses are gradually altered along their extension directions to minimize time constant differences, specifically by reducing or increasing the line widths/thicknesses from the driving chips towards the pixel units, adjusting the equivalent resistances and parasitic capacitances to reduce charging time constants.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the display panel size is increased, then the screen area and resolution are improved, but the time constant difference between metal lines at different locations increases
Solution Approach 1:
The patent applies local quality by making the metal line width vary at different locations along the line. Specifically, the line width is adjusted to be narrower at locations farther from the source/gate driving chips and wider at locations closer to them. This local variation in geometric property compensates for the accumulated RC time constant differences, ensuring more uniform charging/discharging characteristics across the entire large display panel.
Solution Approach 2:
The patent changes the geometric parameter (line width) of the metal lines to optimize performance. By modifying the line width parameter along the extension direction of the metal lines, the patent achieves more uniform time constants across different locations. This parameter change directly addresses the time constant uniformity issue while maintaining the large display panel area.
2Reliability
If metal line material is changed from aluminum to copper, then the electrical conductivity is improved, but the manufacturing complexity and cost increase
Solution Approach 1:
Instead of changing the material parameter, the patent changes the geometric parameter (line width) of the existing metal lines. This approach achieves the desired electrical performance improvement through dimensional modification rather than material substitution, thereby avoiding the manufacturing complexity and cost associated with transitioning from aluminum to copper materials.
3Length of moving object
If dual-sided driving method is implemented, then the signal transmission distance is improved, but the device complexity increases
Solution Approach 1:
The patent applies local quality by implementing non-uniform line width distribution along single-sided metal lines. This local geometric modification effectively extends the usable signal transmission distance by compensating for RC time constant accumulation, achieving dual-sided driving performance benefits while maintaining simpler single-sided driving architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces the time constant differences across the display panel, alleviating issues of insufficient charging and enhancing display quality by ensuring consistent signal transmission across larger panel sizes.
Implementation Method 1
CL is the parasitic capacitance between different metal lines such as between the source line 51 and gate line 52 or between the source line 51 and the common electrode line 53
Implementation Method 2
RL is the equivalent resistance of a portion of the metal line
Data Source
AI summary
A display panel including a plurality of pixel units, a plurality of source lines, a plurality of gate lines and a plurality of common electrode lines is provided. The pixels units are arranged in array. The array includes a plurality of columns and a plurality of rows. The source lines are respectively coupled with the pixel units disposed in a same column of the columns. The gate lines are respectively coupled with the pixel units disposed in a same row of the rows. The common electrode lines and gate lines extend parallelly with each other. At least one of the source date lines, the gate lines and the common electrode lines has the line widths varied along the extension direction thereof.


