Display Panel Multiplex Circuit Bezel Reduction
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Solution Overview
Problem
Current display technologies face challenges in achieving a high screen-to-body ratio due to the space occupied by multiplex circuits and fanout wiring cables, which limits the reduction of the lower bezel width and affects image signal switching response speed.
Innovation Solution
A display panel design incorporating a multiplex circuit with switch devices featuring thin film transistors, where the equivalent channel width-to-length ratio of thin film transistors is optimized to reduce the channel width and length, allowing for slower signal switching response speed in single-color pixel unit columns and faster in multi-color columns, thereby minimizing bezel space and enhancing wiring area without compromising image display speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the multiplex circuit and fanout wiring cables are disposed in the lower bezel area to control charging of data signal lines, then the quantity of wiring cables is reduced and bottom-bench space is saved, but the lower bezel width cannot be sufficiently reduced due to the space occupied by these circuits
Solution Approach 1:
The patent moves the multiplex circuit from the traditional lower bezel area to the display area, specifically utilizing the right-side margin area. This spatial relocation allows the circuit to occupy non-intrusive space while enabling the lower bezel to be significantly narrowed, directly resolving the contradiction between saving bottom-bench space and reducing lower bezel width.
Solution Approach 2:
The patent integrates the multiplex circuit into the display area by nesting it within the right-side margin region. This nesting approach allows the circuit to coexist with the display elements without requiring additional external space, thereby reducing the lower bezel width while maintaining functional integrity.
2Area of stationary object
If the equivalent channel width-to-length ratio of thin film transistors in switch devices is reduced to minimize bezel space, then the multiplex circuit occupies less space, but the signal switching response speed may be affected
Solution Approach 1:
The patent applies different equivalent channel width-to-length ratios to different switch devices based on their specific functional requirements. Switch devices controlling single-color pixel columns use a first ratio, while those controlling multi-color pixel columns use a second ratio. This localized optimization allows space reduction in less critical areas while maintaining adequate response speed in areas where it matters most.
Solution Approach 2:
The patent systematically adjusts the equivalent channel width-to-length ratio parameter of thin film transistors in different switch devices to optimize the balance between circuit compactness and signal switching performance. By varying this critical parameter across different circuit locations, the design achieves both space efficiency and functional adequacy.
3Length of stationary object
If the lower bezel width is reduced to achieve higher screen-to-body ratio, then the display appearance is improved, but the multiplex circuit and fanout wiring cables occupy insufficient space
Solution Approach 1:
The patent relocates the multiplex circuit from the horizontal dimension (lower bezel) to the vertical dimension (display area right-side margin). This dimensional shift allows the lower bezel to be minimized while the circuit finds adequate space in the vertical direction, resolving the spatial conflict between bezel reduction and circuit accommodation.
Solution Approach 2:
The patent nests the multiplex circuit within the display area's right-side margin, utilizing otherwise underused space. This nesting strategy provides sufficient room for the circuit and its wiring without requiring additional external space, thereby enabling aggressive lower bezel reduction.
Data Source
AI summary
Disclosed are a display panel and a display apparatus. The display panel includes a multiplex circuit, a plurality of signal connection lines and a plurality of data signal lines, wherein each of the switch devices in the multiplex circuit comprises at least one thin film transistor; the colors of all pixel units in a first pixel unit column are the same; the colors of at least two pixel units in a second pixel unit column are different; first switch devices correspond to first pixel unit columns; second switch devices correspond to second pixel unit columns; and the equivalent channel width-to-length ratio of thin film transistors in each first switch device is less than the equivalent channel width-to-length ratio of thin film transistors in each second switch device.