Display Panel Odd-Even Row Multiplexing Circuit Reduces Signal Delay

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Solution Overview

Problem

Traditional display panels experience significant transmission delays due to data signals needing to pass through multiple thin film transistors in cascaded multiplexing circuits, affecting display quality.

Innovation Solution

A display panel design that includes a sub-pixel array, data lines, and a multiplexing circuit with alternately arranged odd-numbered and even-numbered thin film transistors, where each type of transistor is sequentially turned on to charge corresponding rows of sub-pixels, reducing the number of data traces and transistors required, and enhancing data signal timeliness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a cascaded multiplexing circuit is used to save fan-out traces, then the number of data traces is reduced, but the data signal transmission delay increases due to passing through multiple thin film transistors

Engineering Contradiction:
Improvenumber of data tracesVSAvoiddata signal transmission delay
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The pixel array is divided into odd-numbered rows and even-numbered rows, with separate data lines and multiplexing circuits for each group. This segmentation allows data signals to pass through fewer thin film transistors (reducing the cascaded path from 2+ transistors to 1 transistor per group), thereby reducing transmission delay while maintaining trace savings through the multiplexing architecture.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If data signals pass through multiple thin film transistors in cascaded multiplexing, then trace routing is simplified, but transmission impedance increases causing signal delay

Engineering Contradiction:
Improvetrace routing complexityVSAvoidsignal transmission quality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

By segmenting the pixel array into odd and even row groups with separate data lines, the patent reduces the number of cascaded thin film transistors in each signal path. This decreases transmission impedance and improves signal quality while maintaining simplified trace routing through the multiplexing structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces separate multiplexing circuits for odd and even rows that act as intermediaries, breaking the long cascaded path into shorter segments. Each multiplexing circuit handles only its designated row group, reducing the total number of transistors in series and improving signal transmission reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12156428B2Display panel enhancing timeliness of data signal transmission and display device with the same
Publication Date: 2024.11.26 WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO LTD
  • US12156428B2 patent drawing
  • US12156428B2 patent drawing
  • US12156428B2 patent drawing

AI summary

A display panel and a display device are provided. In the display panel, at least one odd-numbered thin film transistor is sequentially turned on to charge sub-pixels of a corresponding odd-numbered row before charging sub-pixels of any one of odd-numbered rows is finished, and at least one even-numbered thin film transistor is sequentially turned on to charge sub-pixels of a corresponding even-numbered row before charging sub-pixels of any one of even-numbered rows is finished, thereby saving the number of uses of data traces and thin film transistors, as well as enhancing the timeliness of data signal transmission.