Display Panel Wiring Layout to Reduce Connection-Hole Step Defects

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Solution Overview

Problem

Existing display devices face issues with indentation defects, bending defects, and light leakage due to large steps between connection holes in multi-layer wiring structures, which affect yield and performance.

Innovation Solution

The display panel design includes a configuration where connection holes between adjacent wiring layers are positioned differently and are overlapped by insulating films, reducing the step between these holes, and incorporates a structure with four or more wiring layers to minimize defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple wiring layers are stacked to form pad electrodes, then electrical connection capability is improved, but step height between connection holes increases causing indentation and bending defects

Engineering Contradiction:
Improveelectrical connection capabilityVSAvoidstep height between connection holes
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies dimensional redistribution by arranging connection holes of different wiring layers at different planar positions rather than vertically aligned. This transforms the problem from a vertical stacking issue to a spatial distribution issue, allowing multiple wiring layers to be connected while reducing the step height between adjacent connection holes to 10µm or less.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the connection holes into multiple groups positioned at different planar locations. Instead of having all connection holes aligned in one location creating a large step, the connection holes are divided and distributed across different positions, with each segment contributing to the overall electrical connection while maintaining smaller individual step heights.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If connection holes are vertically aligned for simple routing, then routing complexity is reduced, but light leakage defects occur due to large steps between holes

Engineering Contradiction:
Improverouting complexityVSAvoidlight leakage defects
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The patent resolves the conflict between simple routing and light leakage prevention by introducing planar position variation. Connection holes are arranged at different planar positions rather than vertically aligned, which adds spatial complexity but reduces the vertical step height, thereby preventing light leakage defects while maintaining acceptable routing complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If insulating films are removed to expose wiring layers for connection, then electrical connectivity is improved, but large steps are created causing bending defects

Engineering Contradiction:
Improveelectrical connectivityVSAvoidstructural integrity
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent maintains structural integrity while achieving electrical connectivity by distributing connection holes at different planar positions. This spatial distribution reduces the step height between holes, preventing the substrate from bending during bonding processes, while still providing adequate electrical connectivity through the multi-layer wiring structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent applies local quality by selectively removing insulating films only in specific regions where connection holes are positioned. Rather than removing insulating films broadly, the removal is localized to areas where connection holes are present at different planar positions, maintaining structural integrity in regions where insulating films remain while ensuring connectivity where needed.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250271694A1Display Panel and Display Device Including the Same
Publication Date: 2025.08.28 LG DISPLAY CO LTD
  • US20250271694A1 patent drawing
  • US20250271694A1 patent drawing
  • US20250271694A1 patent drawing

AI summary

Disclosed is a display panel including a substrate having a display area and a non-display area surrounding the display area, a plurality of gate lines and a plurality of data lines provided on the substrate, the gate lines and the data lines intersecting each other in the display area to define a plurality of pixel areas, a plurality of pixel electrodes provided respectively in the pixel areas, a plurality of common electrodes overlapping the pixel electrodes, the common electrodes being located on a different layer than the pixel electrodes, a plurality of touch lines connected respectively to the common electrodes, a plurality of data pad electrodes provided in the non-display area, the data pad electrodes being electrically connected to the data lines, and a plurality of touch pad electrodes provided in the non-display area, the touch pad electrodes being electrically connected to the touch lines.