Display Panel Pixel Connection Layout for Higher Pixel Integration
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Solution Overview
Problem
Existing display devices face challenges in increasing the degree of integration of pixels, which is crucial for enhancing resolution and performance.
Innovation Solution
A display panel design incorporating specific transistor configurations, hold capacitors, and power line arrangements, along with synchronized power and scan signal control, to enhance pixel integration and compensation, allowing for higher resolution and improved display performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the degree of integration of pixels is increased to enhance resolution, then display resolution is improved, but device complexity increases
Solution Approach 1:
The patent connects first and second pixels through a connection electrode, merging their hold capacitors into a shared structure. This integration reduces the total number of separate capacitor components while maintaining the functionality of both pixels, thereby increasing pixel integration density without proportionally increasing overall device complexity
Solution Approach 2:
The connection electrode serves multiple functions: it acts as a structural connector between pixels, a signal transmission path, and a shared electrode for both hold capacitors. This multi-functionality reduces the number of separate components needed, enabling higher pixel integration without linearly increasing device complexity
2Quantity of substance
If transistors and capacitors are optimized for higher integration, then pixel integration is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent divides the pixel array into independently controllable units with shared resources. Each pixel maintains its own transistor structure for independent control, while capacitors are segmented and shared between adjacent pixels. This segmentation allows standardized manufacturing processes to be applied repeatedly, reducing the cumulative impact of precision requirements
Solution Approach 2:
The patent changes the electrical parameters and physical dimensions of transistors and capacitors to optimize integration. By adjusting transistor size, capacitor area, and electrode spacing, the design achieves higher pixel density while maintaining manufacturable parameter ranges that balance integration goals with fabrication precision capabilities
Data Source
AI summary
There are provided a display panel, a display device including the display panel, and an electronic device including the display panel, in which the degree of integration of pixels is increased. The display panel may include a display area in which a first pixel and a second pixel connected to the first pixel through a connection electrode are disposed. The display panel may include a non-display area at the periphery of the display area.