Display Panel Multi-Layer Power Line Structure
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Solution Overview
Problem
Current display panels face challenges in achieving improved reliability and efficiency in pixel control due to limitations in the design and integration of transistors and power lines, which affect the overall display quality.
Innovation Solution
The display panel incorporates a specific configuration of transistors and power lines, including a first and second power line with overlapping structures, and a bridge pattern connecting transistors, to enhance voltage distribution and reduce parasitic capacitance, thereby improving reliability and display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power lines are configured in a conventional single-layer structure, then the device complexity is reduced, but the voltage distribution efficiency and parasitic capacitance reduction are insufficient
Solution Approach 1:
The patent transitions from a conventional single-layer power line structure to a multi-layer structure where the second power line is positioned on a different layer than the first power line. This dimensional change allows for optimized voltage distribution and reduced parasitic capacitance between adjacent lines, thereby improving display panel reliability without significantly increasing overall device complexity.
Solution Approach 2:
The power line system is segmented into multiple independent lines (first power line and second power line) positioned on different layers. Each line can be independently optimized for its specific function, allowing for better voltage distribution control and reduced electromagnetic interference between power lines and data lines.
2Reliability
If transistors and power lines are integrated in a conventional manner, then the manufacturing process is simpler, but the parasitic capacitance is higher and voltage distribution is less efficient
Solution Approach 1:
The patent employs multi-layer integration where the second power line is positioned on a different layer from the first power line and data lines. This vertical separation reduces parasitic capacitance between adjacent conductors while maintaining efficient voltage distribution to pixels, improving pixel control reliability without significantly complicating the manufacturing process.
Solution Approach 2:
The patent applies different spatial configurations to different conductors based on their functional requirements. Power lines are positioned on specific layers optimized for voltage distribution, while data lines are positioned on other layers to minimize interference. This localized optimization of conductor positioning enhances pixel control reliability while maintaining manufacturing feasibility.
Data Source
AI summary
A display panel includes: a first pixel connected to a reference line, a scan line, a sensing line, a first power line, a first data line, and a second power line. The first pixel includes a first transistor, a second transistor, a third transistor, a light-emitting element, and a capacitor. The light-emitting element includes a first electrode, a second electrode, and a light-emitting layer between the first electrode and the second electrode. The second power line includes a first line and a second line overlapping with the first line, the first line being located on an insulating layer on which the first data line is located, and the second line being located on an insulating layer different from the insulating layer on which the first line is located. The first line is spaced from the first data line, and the second line overlaps with the first data line.