Display Panel Self-Checking Mode for Crushed Gate Line Detection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Display panels with crushed gate lines are not detectable before leaving the factory, leading to abnormal display issues and subsequent factory returns for maintenance, causing inconvenience to users.

Innovation Solution

A method involving a display panel that enters a self-checking mode upon startup, performing row scanning at a higher preset frame rate than normal to shorten charging time for each Thin Film Transistor (TFT), allowing crushed gate lines to be identified by abnormal display issues, and prompting maintenance to avoid later returns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the display panel operates at normal frame rate, then the display quality is maintained, but crushed gate lines cannot be detected

Engineering Contradiction:
Improvedefect detection capabilityVSAvoiddisplay refresh rate
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies preliminary action by performing defect detection before normal display operation. The system enters a self-checking mode upon startup where crushed gate lines are detected by scanning at high frame rate, and only after successful detection does the panel transition to normal display mode. This resolves the contradiction by prioritizing defect detection capability before productivity requirements.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamics by dynamically adjusting the frame rate based on operational mode. The display panel operates at high frame rate (e.g., 120Hz or 240Hz) during self-checking mode to enable defect detection, then switches to normal frame rate (e.g., 60Hz) during display operation. This dynamic adjustment allows the system to achieve both high detection sensitivity and normal display performance at different times.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If the display panel enters self-checking mode with high frame rate scanning, then crushed gate lines can be detected, but energy consumption increases

Engineering Contradiction:
Improvegate line defect detection accuracyVSAvoidenergy consumption during scanning
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies periodic action by limiting high frame rate scanning to specific periodic intervals - specifically during startup self-checking mode. The system performs high frame rate scanning only during this brief initial period to detect crushed gate lines, then switches to normal operation mode. This periodic implementation achieves defect detection while minimizing energy consumption by avoiding continuous high frame rate operation.

Inventive Principle:
Principle #19Periodic action

3Measurement precision

If the charging time of each TFT is shortened by increasing frame rate, then crushed gate lines are foregrounded for detection, but the TFT may not reach target charging voltage

Engineering Contradiction:
Improvedefect visibilityVSAvoidTFT charging completeness
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent applies segmentation by dividing the operation into distinct phases: self-checking mode and normal display mode. During self-checking mode, the system uses high frame rate with shortened charging time to foreground defects for detection. During normal display mode, the system uses lower frame rate with sufficient charging time to ensure complete TFT charging and reliable display. This segmentation allows each phase to optimize for its specific purpose without compromising the other.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11705027B2Method for detecting gate line defects, display panel and readable storage medium
Publication Date: 2023.07.18 BEIHAI HKC OPTOELECTRONICS TECH CO LTD
  • US11705027B2 patent drawing
  • US11705027B2 patent drawing
  • US11705027B2 patent drawing

AI summary

The application discloses a method for detecting gate line defects, a display panel and a readable storage medium. The method for detecting gate line defects includes the following operations: controlling a display panel to enter a self-checking mode upon receiving a startup signal; performing row scanning on the display panel according to a first preset frame rate, where the first preset frame rate is greater than a normal frame rate when the display panel normally operates; and upon determining that the display panel is abnormal, issuing a prompt message.