Display Panel Power Management Circuit Sequential Switching
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Solution Overview
Problem
In liquid crystal display panels, the convergence of currents from multiple output channels during the power-on reset stage can lead to excessive current on the analog power signal output bus, damaging connected components due to voltage differences between power amplifiers.
Innovation Solution
A display panel design incorporating a power management circuit with switching units that turn on source driving chips in different time periods, using a boost circuit to enhance the analog power signal, and a shift signal output circuit to manage the sequential activation of switching units, preventing excessive current on the output bus.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the power management circuit provides digital power signals to multiple source driving chips simultaneously, then the power-on reset operation can be completed quickly, but excessive current converges on the analog power signal output bus causing component damage
Solution Approach 1:
The power management circuit segments the power-on reset operation by controlling switching units to activate different source driving chips at different time periods. This segmentation distributes the current draw across time rather than concentrating it simultaneously, preventing excessive current convergence on the analog power signal output bus while still completing the power-on reset operation for all chips.
Solution Approach 2:
The power management circuit implements periodic action by sequentially enabling source driving chips in different time periods through controlled switching units. Each chip receives the digital power signal and performs power-on reset in a staggered manner, creating a periodic pattern of activation that prevents current overload while maintaining overall system productivity.
2Loss of time
If switching units are turned on simultaneously, then the system operation can start quickly, but current convergence damages components connected to the output bus
Solution Approach 1:
The power management circuit performs preliminary action by pre-controlling the switching units to activate source driving chips in a predetermined sequential order. This preliminary control arrangement ensures that chips are enabled at different time periods before full operation begins, preventing current damage while maintaining efficient system startup.
Solution Approach 2:
The switching units serve as intermediary components between the power management circuit and source driving chips. These intermediaries control the timing of power signal delivery, acting as buffers that prevent direct simultaneous current convergence on the output bus while still enabling all chips to operate eventually.
3Reliability
If sequential switching is implemented to prevent current damage, then component safety is improved, but the power-on reset operation takes longer
Solution Approach 1:
The power management circuit applies parameter changes by adjusting the timing parameters of switching unit activation. By controlling the duration and spacing of time periods when different chips are enabled, the system balances component protection with acceptable power-on reset duration, optimizing both reliability and operational efficiency.
Data Source
AI summary
A display panel includes a plurality of source driving chips, a power management circuit, and a plurality of switching units. The power management circuit includes a first output terminal, and the first output terminal is configured to provide a digital power signal to the source driving chips; and the plurality of switching units are respectively arranged corresponding to at least one of the source driving chips, the switching units are connected to the first output terminal and the corresponding source driving chips, and at least part of the switching units are configured to turn on the corresponding source driving chips and the first output terminal in different time periods in response to different control signals.