Display Panel Shared Scan Line Aperture Ratio
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Solution Overview
Problem
Liquid crystal display panels suffer from color washout when viewed at large angles, and existing solutions that improve this issue, such as dividing pixels into primary and secondary pixels, reduce the aperture ratio and increase costs due to the need for additional scan lines and driver chips.
Innovation Solution
A display panel design that includes a pixel array substrate with shared third scan lines, allowing for improved aperture ratio while addressing color washout by varying voltages across pixel electrodes using capacitors and transistors, reducing the number of driver chips required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a scan line is added to each pixel to control different voltages for primary and secondary pixels, then color washout is improved, but aperture ratio decreases
Solution Approach 1:
The patent merges the function of the third scan line with existing scan line infrastructure by having it share control with both primary and secondary pixels. The third scan line is electrically connected to both the third pixel electrode (primary pixel) and fourth pixel electrode (secondary pixel) through fifth transistors, allowing one scan line to control multiple pixel electrodes without requiring separate dedicated scan lines for each pixel type.
Solution Approach 2:
The third scan line serves multiple functions: it controls the third pixel electrode of primary pixels through fifth transistors, controls the fourth pixel electrode of secondary pixels through fifth transistors, and can be shared with existing scan line timing structures. This multi-functional approach allows a single scan line to perform what would traditionally require multiple dedicated scan lines.
2Object-affected harmful factors
If additional scan lines are added to control voltages for different pixel portions, then viewing angle performance is improved, but driver chip cost increases
Solution Approach 1:
The patent combines the control function of what would be separate scan lines into a shared third scan line. By electrically connecting this single scan line to both primary and secondary pixel electrodes through fifth transistors, the system merges multiple control functions into one physical scan line, reducing the number of driver chip outputs required.
Solution Approach 2:
The fifth transistors act as intermediary switching elements between the shared third scan line and the different pixel electrodes. These transistors mediate the control signals, allowing a single scan line to selectively control different pixel electrodes at different times during the display period, thereby reducing driver chip complexity while maintaining full control capability.
3Object-affected harmful factors
If pixels are divided into primary and secondary portions with different voltages, then color washout is reduced, but device complexity increases
Solution Approach 1:
The patent segments each pixel into primary and secondary portions (first/second pixel electrodes for primary pixels, third/fourth pixel electrodes for secondary pixels) that can be controlled with different voltages. This segmentation allows different voltage applications to different portions of the same pixel, improving viewing angle performance while maintaining a manageable structure through systematic organization.
Solution Approach 2:
The patent implements dynamic voltage control where the third scan line can apply different voltages to third and fourth pixel electrodes at different time periods within the display period. This dynamic switching capability allows the system to optimize voltage distribution across different pixel portions without requiring permanently separate control lines, balancing complexity with performance.
Data Source
AI summary
A display panel and a driving method thereof are provided. In a pixel array substrate of the display panel, each first transistor electrically connects to a corresponding first pixel electrode, each second transistor electrically connects to a corresponding second pixel electrode, each third transistor electrically connects to a corresponding third pixel electrode, and each fourth transistor electrically connects to a corresponding fourth pixel electrode. A plurality of data lines electrically connect to the corresponding first, second, third and fourth transistors. Each first scan line electrically connects to the first and third transistors. Each second scan line electrically connects to the second and fourth transistors. A plurality of third scan lines are located between the corresponding first and second scan lines and electrically connect to the corresponding third and fourth pixel electrodes via fifth transistors.