Display Panel Scanning Line Layout for Signal Integrity
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Solution Overview
Problem
Micro OLED displays face challenges with signal line resistance and parasitic capacitance issues due to increased pixel density and overlapping regions, leading to signal delay, voltage drop, and display defects such as dark lines.
Innovation Solution
An optimized layout and wiring design for the display substrate with a pixel circuit array, incorporating a resistance device between the driving sub-circuit and light-emitting element to manage potential differences and prevent latch-up effects, along with a complementary data writing sub-circuit to ensure signal integrity and fine gray-scale control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If pixel density is increased to achieve high resolution, then display quality is improved, but signal line resistance and parasitic capacitance increase causing signal delay and voltage drop
Solution Approach 1:
The pixel circuit is divided into separate functional sub-circuits (driving sub-circuit, data writing sub-circuit, storage sub-circuit) with dedicated connection paths. This segmentation allows optimization of signal transmission paths for different functions, reducing interference and maintaining signal integrity despite high pixel density.
Solution Approach 2:
A resistance device is introduced as an intermediary component between the driving sub-circuit and light-emitting element. This resistance device acts as a buffer to manage potential differences and control current flow, preventing direct coupling effects and maintaining stable operation under high pixel density conditions.
2Adaptability or versatility
If overlapping regions between signal lines are increased to route more connections, then circuit connectivity is improved, but parasitic capacitance increases causing signal delay
Solution Approach 1:
Different regions of the display substrate are designed with different wiring densities and routing patterns. Areas with higher signal sensitivity have reduced overlapping and optimized routing to minimize parasitic capacitance, while other regions can accommodate more complex interconnections. This local optimization balances connectivity needs with signal transmission quality.
3Reliability
If resistance device is added to manage potential differences, then latch-up prevention is improved, but device complexity increases
Solution Approach 1:
The resistance device is integrated into the existing pixel circuit structure and shares fabrication processes with other circuit components. The resistance device is formed using the same thin-film transistor fabrication techniques, allowing it to be incorporated without adding separate manufacturing steps or significantly increasing device complexity.
4Measurement precision
If complementary data writing sub-circuit is implemented for signal integrity, then gray-scale control precision is improved, but circuit complexity increases
Solution Approach 1:
The complementary data writing sub-circuit uses transistor pairs with opposite polarities (N-type and P-type) that can perform multiple functions including signal writing, storage, and compensation. These multi-functional components reduce the need for separate dedicated circuits for each function, thereby limiting the increase in overall circuit complexity while maintaining precise gray-scale control.
Data Source
Figure 1A~1B
Figure 1C~2A
Figure 2B~2C
AI summary
A display panel and a display device. The display substrate comprises a base substrate, and a pixel row, a first scanning line and a second scanning line disposed on the base substrate. The pixel row comprises a plurality of sub-pixels arranged along a first direction on the base substrate; the first scanning line and the second scanning line extend along a first direction; each sub-pixel comprises a pixel circuit; the pixel circuit comprises a data writing sub-circuit, a memory sub-circuit, and a driving sub-circuit. The first scanning line and the second scanning line are respectively electrically connected to a data writing circuit for providing a control signal; the resistance of the first scanning line is identical to that of the second scanning line, and the areas of the orthographic projections of the first and second scanning lines on the base substrate are the same. The display substrate has good anti-interference performance.