Display Panel Signal Line Stacking for Narrower Border Regions

The patent transitions from planar signal line arrangement to three-dimensional multi-layer arrangement with vertical stacking. Signal lines are distributed across multiple conductive layers (first gate conductive layer, second gate conductive layer, third gate conductive layer) with orthographic projections that overlap on the substrate, effectively utilizing the vertical dimension to reduce horizontal space occupation and minimize border region area.

The patent implements nested arrangement where signal lines in different conductive layers are positioned to overlap when projected onto the substrate. The first, second, and third gate conductive layers are stacked vertically with their signal lines nested in overlapping positions, allowing compact integration of multiple signal paths within a reduced horizontal footprint.

The patent employs multiple gate conductive layers that serve dual functions: they act as signal transmission lines for different signal types (scan signals, reset signals, enable signals) and simultaneously function as gate electrodes for transistor control. This multi-functionality reduces the need for separate dedicated signal lines and simplifies the overall structure despite the multi-layer arrangement.

The patent utilizes different potential distributions and electrical characteristics for signal lines in different conductive layers. By assigning specific voltage potentials to lines in the first, second, and third gate conductive layers, the system optimizes signal integrity and minimizes interference while maintaining a compact overlapping layout.