Display Panel Source Driver Voltage Compensation for RC Delay
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Solution Overview
Problem
The half source driver (HSD) architecture in display panels causes vertical bright and dark lines due to resistance-capacitance (RC) delay, affecting the display effect by not allowing the voltage of the second column of pixels to reach the driving voltage in time, resulting in dark pixels and bright lines.
Innovation Solution
The display panel design includes a source driver that outputs driving voltages to each column of pixels, where the voltage for the first column is smaller than the second column for the same gray scale value, reducing the brightness difference and minimizing the visibility of vertical bright and dark lines by adjusting the polarity and charging time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the HSD architecture is used to reduce cost by omitting the source driver, then the cost is reduced, but vertical bright and dark lines appear affecting display quality
Solution Approach 1:
The patent applies local quality by making different columns of pixels have different driving voltages. Specifically, even columns are driven with voltage Vdata while odd columns are driven with voltage Vdata + Vcomp, where Vcomp is a compensation voltage. This local differentiation compensates for the RC delay effect that causes vertical bright and dark lines, thereby improving display quality while maintaining the cost-saving HSD architecture.
2Device complexity
If the HSD architecture is used to simplify the driver structure, then device complexity is reduced, but RC delay causes voltage to not reach the second column of pixels in time, resulting in dark pixels and bright lines
Solution Approach 1:
The patent changes the voltage parameter for different pixel columns to compensate for RC delay effects. By applying a compensation voltage Vcomp to odd columns, the patent adjusts the electrical parameters to ensure uniform pixel activation across all columns, eliminating the vertical bright and dark lines caused by timing delays in the simplified HSD architecture.
Data Source
AI summary
The present application discloses a display panel, a display panel driving method, and a display device. Each row of pixels includes a plurality of pixel groups, and each pixel group includes a first column of pixels and a second column of pixels which are adjacent; the first column of pixels and the second column of pixels are connected to a same data line; the first column of pixels is connected with a 2n−1th row of scanning lines, and the second column of pixels is connected with a 2nth row of scanning lines; a source driver outputs a driving voltage to each column of pixels, where for a same gray scale value, a driving voltage corresponding to the first column of pixels of at least one column is smaller than a driving voltage corresponding to the second column of pixels.