Display Panel Storage Capacitor Stacked Electrode Design
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Solution Overview
Problem
The challenge in display technology is to reduce the occupied space of storage capacitors in display panels without decreasing their capacitance values, as they occupy a large region and limit the space for other components.
Innovation Solution
A display panel design featuring a stacked configuration of conducting layers with overlapping electrode layers to form storage capacitors in a sandwich capacitor mode, increasing capacitance while reducing occupied space by arranging the first, second, and third conducting layers on different layers with insulating layers and via holes for electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If storage capacitors are designed with traditional planar structure, then manufacturing is simple, but occupied area is large
Solution Approach 1:
The patent transitions from a planar two-dimensional capacitor structure to a three-dimensional stacked structure with multiple conducting layers (first, second, and third conducting layers) arranged vertically. This dimensional change allows the capacitor to achieve higher capacitance in a smaller footprint area by utilizing vertical stacking rather than horizontal expansion.
Solution Approach 2:
The patent implements a nested structure where multiple electrode layers are stacked vertically with insulating layers in between. The first electrode layer, second electrode layer, and third electrode layer are arranged in a nested configuration where each layer is contained within the vertical space occupied by the overall capacitor structure, effectively nesting multiple capacitive elements within a compact volume.
2Area of stationary object
If storage capacitors occupy large region, then capacitance values can be maintained, but space for other components is reduced
Solution Approach 1:
By stacking multiple conducting layers vertically, the patent increases the effective capacitance area without increasing the horizontal footprint. The multiple electrode layers (first, second, and third) create parallel capacitive paths that sum to provide the required capacitance value while maintaining a compact area that leaves sufficient space for other display panel components.
Data Source
AI summary
The present disclosure discloses a display panel, a preparation method thereof and a display device. A first conducting layer includes a first electrode layer, a second conducting layer includes a second electrode layer, a third conducting layer includes a third electrode layer, an orthographic projection of the first electrode layer on a base substrate, an orthographic projection of the second electrode layer on the base substrate and an orthographic projection of the third electrode layer on the base substrate have an overlap region with one another, in this way, the first electrode layer and the third electrode layer may be electrically connected with each other to serve as one electrode of a storage capacitor, the second electrode layer may serve as another electrode of the storage capacitor, thus the storage capacitor may be formed in a sandwich capacitor mode, and a capacitance value of the storage capacitor may be increased.