Display Panel Test Circuit Non-Display Area Layout
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Solution Overview
Problem
The existing chip on glass (COG) technology for display panels, which uses anisotropic conductive film (ACF) to fix driver ICs, results in a larger occupied space due to switches being arranged in two rows, hindering the narrow frame design and reducing the screen ratio of display panels.
Innovation Solution
The arrangement of switches is modified such that the first and second switches are placed in the same row parallel to each other, with signal lines and transmission lines connected to them, allowing for efficient signal transmission and performance testing of pixels while minimizing space in the non-display area, thereby increasing the screen ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the first switch and the second switch are disposed in two rows, then the test circuit can perform performance testing on pixels, but the occupied space in the non-display area increases
Solution Approach 1:
The patent transitions from a two-row vertical arrangement to a single-row horizontal arrangement of switches, utilizing the horizontal dimension more effectively. This dimensional reorganization allows the first and second switches to be disposed side-by-side in the same row, reducing the vertical space occupation in the non-display area while maintaining all necessary testing functions.
Solution Approach 2:
The patent merges the first switch and second switch into the same row, combining their spatial occupation into a single horizontal line rather than distributing them across two rows. This merging approach, coupled with sharing common signal lines and transmission lines, reduces the overall area required for the test circuit in the non-display area.
2Reliability
If switches are arranged in two rows, then comprehensive pixel testing is enabled, but the screen ratio of the display panel decreases
Solution Approach 1:
The patent reorganizes the switch arrangement from vertical two-row configuration to horizontal single-row configuration, effectively utilizing the horizontal dimension. This dimensional change reduces the vertical footprint of the test circuit, thereby increasing the display area and screen ratio while preserving complete pixel testing capability through the redistributed signal line connections.
3Reliability
If the first switch and second switch are disposed in two rows, then signal transmission can be achieved, but the narrow frame design is hindered
Solution Approach 1:
The patent merges the first and second switches into a single row and combines their signal transmission paths by sharing common signal lines and transmission lines. This merging reduces the overall space requirement in the non-display area, allowing for a narrower frame design while maintaining full signal transmission functionality for pixel testing.
Solution Approach 2:
The patent implements multi-functionality by having the first and second switches share common signal lines and transmission lines. This universal approach allows a single set of lines to serve multiple testing functions, reducing the total number of required connections and the space they occupy, thereby enabling narrow frame design.
Data Source
AI summary
A non-display area is disposed around a display area, a test circuit of non-display area comprises a plurality of signal lines disposed in parallel along a first direction, a plurality of switch groups are disposed in a same row along a second direction, a connecting signal line and a plurality of transmission line groups, the display area comprises a plurality of pixel groups disposed in parallel along the second direction, the second direction and the first direction are perpendicular to each other, and each of switch groups comprises a first switch and a second switch disposed in the same row along the second direction.